linux-kernel - Re: [PATCH RFC v2 03/17] RISC-V: Add support for srmcfg CSR from Ssqosid ext

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Message-ID: <aYJP/tXv7UeSAJqy@x1>
Date: Tue, 3 Feb 2026 11:43:58 -0800
From: Drew Fustini <fustini@...nel.org>
To: yunhui cui <cuiyunhui@...edance.com>
Cc: Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
	Radim Krčmář <rkrcmar@...tanamicro.com>,
	Samuel Holland <samuel.holland@...ive.com>,
	Adrien Ricciardi <aricciardi@...libre.com>,
	Nicolas Pitre <npitre@...libre.com>,
	Kornel Dulęba <mindal@...ihalf.com>,
	Atish Patra <atish.patra@...ux.dev>,
	Atish Kumar Patra <atishp@...osinc.com>,
	Vasudevan Srinivasan <vasu@...osinc.com>,
	Ved Shanbhogue <ved@...osinc.com>,
	Chen Pei <cp0613@...ux.alibaba.com>,
	Liu Zhiwei <zhiwei_liu@...ux.alibaba.com>,
	Weiwei Li <liwei1518@...il.com>, guo.wenjia23@....com.cn,
	liu.qingtao2@....com.cn,
	Reinette Chatre <reinette.chatre@...el.com>,
	Tony Luck <tony.luck@...el.com>, Babu Moger <babu.moger@....com>,
	Peter Newman <peternewman@...gle.com>,
	Fenghua Yu <fenghua.yu@...el.com>,
	James Morse <james.morse@....com>, Ben Horgan <ben.horgan@....com>,
	Dave Martin <Dave.Martin@....com>, linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org, x86@...nel.org,
	Rob Herring <robh@...nel.org>,
	"Rafael J. Wysocki" <rafael@...nel.org>,
	Len Brown <lenb@...nel.org>, Robert Moore <robert.moore@...el.com>,
	Sunil V L <sunilvl@...tanamicro.com>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	linux-acpi@...r.kernel.org, acpica-devel@...ts.linux.dev,
	devicetree@...r.kernel.org
Subject: Re: [PATCH RFC v2 03/17] RISC-V: Add support for srmcfg CSR from
 Ssqosid ext

On Mon, Feb 02, 2026 at 12:27:59PM +0800, yunhui cui wrote:
> Hi Drew，
> 
> On Thu, Jan 29, 2026 at 4:28 AM Drew Fustini <fustini@...nel.org> wrote:
> >
> > Add support for the srmcfg CSR defined in the Ssqosid ISA extension
> > (Supervisor-mode Quality of Service ID). The CSR contains two fields:
> >
> >   - Resource Control ID (RCID) used determine resource allocation
> >   - Monitoring Counter ID (MCID) used to track resource usage
> >
> > Requests from a hart to shared resources like cache will be tagged with
> > these IDs. This allows the usage of shared resources to be associated
> > with the task currently running on the hart.
> >
> > A srmcfg field is added to thread_struct and has the same format as the
> > srmcfg CSR. This allows the scheduler to set the hart's srmcfg CSR to
> > contain the RCID and MCID for the task that is being scheduled in. The
> > srmcfg CSR is only written to if the thread_struct.srmcfg is different
> > than the current value of the CSR.
> >
> > A per-cpu variable cpu_srmcfg is used to mirror that state of the CSR.
> > This is because access to L1D hot memory should be several times faster
> > than a CSR read. Also, in the case of virtualization, accesses to this
> > CSR are trapped in the hypervisor.
> >
> > Link: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0
> > Co-developed-by: Kornel Dulęba <mindal@...ihalf.com>
> > Signed-off-by: Kornel Dulęba <mindal@...ihalf.com>
> > [fustini: rename csr, refactor switch_to, rebase on upstream]
> > Signed-off-by: Drew Fustini <fustini@...nel.org>
> > ---
> >  MAINTAINERS                        |  7 +++++++
> >  arch/riscv/Kconfig                 | 17 ++++++++++++++++
> >  arch/riscv/include/asm/csr.h       |  8 ++++++++
> >  arch/riscv/include/asm/processor.h |  3 +++
> >  arch/riscv/include/asm/qos.h       | 41 ++++++++++++++++++++++++++++++++++++++
> >  arch/riscv/include/asm/switch_to.h |  3 +++
> >  arch/riscv/kernel/Makefile         |  2 ++
> >  arch/riscv/kernel/qos/Makefile     |  2 ++
> >  arch/riscv/kernel/qos/qos.c        |  5 +++++
> >  9 files changed, 88 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 765ad2daa218..e98d553bd0ca 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -22505,6 +22505,13 @@ F:     drivers/perf/riscv_pmu.c
> >  F:     drivers/perf/riscv_pmu_legacy.c
> >  F:     drivers/perf/riscv_pmu_sbi.c
> >
> > +RISC-V QOS RESCTRL SUPPORT
> > +M:     Drew Fustini <fustini@...nel.org>
> 
> If you don’t mind, to help support RISC-V QoS resctrl development and
> ensure interface stability, could you please add an 'R:' entry with my
> email address?

Sure, I will add in next revision.

Thanks,
Drew