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Message-ID: <0c3acd1c-5860-4819-9b36-6935137deea8@linaro.org>
Date: Tue, 3 Feb 2026 23:19:39 +0000
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Taniya Das <quic_tdas@...cinc.com>,
Jonathan Marek <jonathan@...ek.ca>, Ulf Hansson <ulf.hansson@...aro.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Vikash Garodia <vikash.garodia@....qualcomm.com>,
Dikshita Agarwal <dikshita.agarwal@....qualcomm.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Stanimir Varbanov <stanimir.varbanov@...aro.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>, Hans Verkuil <hverkuil@...nel.org>,
Stefan Schmidt <stefan.schmidt@...aro.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Dikshita Agarwal <dikshita@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, linux-media@...r.kernel.org,
Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
Subject: Re: [PATCH v2 1/8] dt-bindings: clock: qcom,sm8250-videocc: account
for the MX domain
On 01/02/2026 10:48, Dmitry Baryshkov wrote:
> To configure the video PLLs and enable the video GDSCs on SM8250,
> platform, the MX rail must be ON along with MMCX. Split the bindings
> file in order to provide separate file utilizing MMCX and MX power
> domains.
>
> Fixes: dafb992a95e1 ("dt-bindings: clock: add SM8250 QCOM video clock bindings")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
> ---
> .../bindings/clock/qcom,sm8250-videocc.yaml | 85 ++++++++++++++++++++++
> .../devicetree/bindings/clock/qcom,videocc.yaml | 20 -----
> 2 files changed, 85 insertions(+), 20 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8250-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8250-videocc.yaml
> new file mode 100644
> index 000000000000..341d3cbb7cbb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8250-videocc.yaml
> @@ -0,0 +1,85 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sm8250-videocc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Video Clock & Reset Controller
> +
> +maintainers:
> + - Taniya Das <quic_tdas@...cinc.com>
> +
> +description: |
> + Qualcomm video clock control module provides the clocks, resets and power
> + domains on Qualcomm SoCs.
> +
> + See also::
> + include/dt-bindings/clock/qcom,videocc-sm8250.h
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - qcom,sm8250-videocc
> +
> + clocks:
> + items:
> + - description: AHB
> + - description: Board XO source
> + - description: Board active XO source
> +
> + clock-names:
> + items:
> + - const: iface
> + - const: bi_tcxo
> + - const: bi_tcxo_ao
> +
> + power-domains:
> + items:
> + - description:
> + A phandle and PM domain specifier for the MMCX power domain.
> + - description:
> + A phandle and PM domain specifier for the MX power domain.
> +
> + required-opps:
> + items:
> + - description:
> + A phandle to an OPP node describing required MMCX performance point.
> + - description:
> + A phandle to an OPP node describing required MX performance point.
> +
> +required:
> + - compatible
> + - clocks
> + - clock-names
> + - '#power-domain-cells'
> + - power-domains
> + - required-opps
> +
> +allOf:
> + - $ref: qcom,gcc.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,rpmh.h>
> + #include <dt-bindings/power/qcom,rpmhpd.h>
> + clock-controller@...0000 {
> + compatible = "qcom,sm8250-videocc";
> + reg = <0x0ab00000 0x10000>;
> + clocks = <&gcc_gcc_video_ahb_clk>,
> + <&rpmhcc RPMH_CXO_CLK>,
> + <&rpmhcc RPMH_CXO_CLK_A>;
> + clock-names = "iface",
> + "bi_tcxo",
> + "bi_tcxo_ao";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + power-domains = <&rpmhpd RPMHPD_MMCX>,
> + <&rpmhpd RPMHPD_MX>;
> + required-opps = <&rpmhpd_opp_low_svs>,
> + <&rpmhpd_opp_low_svs>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
> index f4ff9acef9d5..8676c7e22b4c 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
> @@ -19,7 +19,6 @@ description: |
> include/dt-bindings/clock/qcom,videocc-sc7280.h
> include/dt-bindings/clock/qcom,videocc-sdm845.h
> include/dt-bindings/clock/qcom,videocc-sm8150.h
> - include/dt-bindings/clock/qcom,videocc-sm8250.h
>
> properties:
> compatible:
> @@ -30,7 +29,6 @@ properties:
> - qcom,sdm845-videocc
> - qcom,sm6350-videocc
> - qcom,sm8150-videocc
> - - qcom,sm8250-videocc
> - items:
> - const: qcom,sc8180x-videocc
> - const: qcom,sm8150-videocc
> @@ -128,24 +126,6 @@ allOf:
> - const: iface
> - const: bi_tcxo
>
> - - if:
> - properties:
> - compatible:
> - enum:
> - - qcom,sm8250-videocc
> - then:
> - properties:
> - clocks:
> - items:
> - - description: AHB
> - - description: Board XO source
> - - description: Board active XO source
> - clock-names:
> - items:
> - - const: iface
> - - const: bi_tcxo
> - - const: bi_tcxo_ao
> -
> unevaluatedProperties: false
>
> examples:
>
> --
> 2.47.3
>
>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
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