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Message-ID: <62860c39-18cc-4db7-89ab-f85a39e67974@oss.qualcomm.com>
Date: Tue, 3 Feb 2026 10:07:22 +0530
From: Sushrut Shree Trivedi <sushrut.trivedi@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/2] arm64: dts: qcom:
qcs6490-rb3gen2-industrial-mezzanine: Add TC9563 PCIe switch nodes
Hi,
Apologies for the error, this is v1 series.
Thanks
On 2/3/2026 10:01 AM, Sushrut Shree Trivedi wrote:
> Add nodes for the two additional TC9563 PCIe switches present on the
> QCOM RB3Gen2 Industrial Mezzanine platform.
>
> One of the TC9563 is connected directly to the PCIe0 root-port while
> the second TC9563 switch is connected in cascade fashion to another
> already available TC9563 switch on PCIe1 via the former's downstream
> port (DSP). The final PCIe hierarchy on the Industrial Mezz platform
> would look something like below:
>
> ┌────────────────────────────┐
> │ │
> │ │
> │ │
> │ SoC │
> │ │
> │ PCIe0 PCIe1 │
> │ ┌───┐ ┌───┐ │
> └────└─┬─┘───────────└─┬─┘───┘
> │ │
> │ │
> │ │
> ┌────────────────┘ └────────────────┐
> │ │
> │ │
> │ │
> ┌────────┴─────────┐ ┌──────────┴───────┐
> │ USP │ │ USP │
> │ │ │ │
> │ TC9563 │ │ TC9563 │
> │ │ │ │
> │ │ │ │
> │ DSP1 DSP2 DSP3 │ │ DSP1 DSP2 DSP3 │
> └──┬──────┬─────┬──┘ └───┬─────┬─────┬──┘
> │ │ │ │ │ │
> │ │ │ │ │ │
> │ │ │ │ │ │
> │ │ │ │ EP ETHERNET
> │ │ │ │
> │ │ │ └──────┐
> EP EP ETHERNET │
> │
> │
> ┌─────────┴────────┐
> │ USP │
> │ │
> │ TC9563 │
> │ │
> │ │
> │ DSP1 DSP2 DSP3 │
> └──┬──────┬─────┬──┘
> │ │ │
> │ │ │
> │ │ │
> │ │ │
> │ │ │
> EP EP ETHERNET
>
>
>
> Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@....qualcomm.com>
> ---
> Changes in v2:
> - EDITME: describe what is new in this series revision.
> - EDITME: use bulletpoints and terse descriptions.
> - Link to v1: https://lore.kernel.org/r/20260131-industrial-mezzanine-pcie-v1-0-b3c2905dd768@oss.qualcomm.com
>
> ---
> Sushrut Shree Trivedi (2):
> arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add TC9563 PCIe switch node for PCIe0
> arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add second TC9563 PCIe switch node for PCIe1
>
> .../qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso | 234 +++++++++++++++++++++
> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 12 +-
> 2 files changed, 240 insertions(+), 6 deletions(-)
> ---
> base-commit: 4f938c7d3b25d87b356af4106c2682caf8c835a2
> change-id: 20260131-industrial-mezzanine-pcie-75dd851f5b04
>
> Best regards,
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