linux-kernel - Re: [PATCH V2 net-next] net: stmmac: Fix typo from clk_scr_i to clk_csr

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Message-ID: <3f8af642-c4cc-4cfc-8da4-f84b3de1bfb9@linux.dev>
Date: Tue, 3 Feb 2026 14:54:48 +0800
From: Yanteng Si <si.yanteng@...ux.dev>
To: Huacai Chen <chenhuacai@...ngson.cn>, Huacai Chen
 <chenhuacai@...nel.org>, Andrew Lunn <andrew+netdev@...n.ch>,
 "David S . Miller" <davem@...emloft.net>, Eric Dumazet
 <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
 Paolo Abeni <pabeni@...hat.com>
Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>,
 Jose Abreu <joabreu@...opsys.com>, Serge Semin <fancer.lancer@...il.com>,
 loongarch@...ts.linux.dev, netdev@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 net-next] net: stmmac: Fix typo from clk_scr_i to
 clk_csr_i


在 2026/2/3 14:26, Huacai Chen 写道:
> In include/linux/stmmac.h clk_csr_i is spelled as clk_scr_i by mistake,
> so correct the typo.
>
> Signed-off-by: Huacai Chen <chenhuacai@...ngson.cn>

Reviewed-by: Yanteng Si <siyanteng@...oftware.com.cn>


Thanks,

Yanteng

> ---
> V2: Update subject line and remove "Cc stable".
>
>   include/linux/stmmac.h | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
> index f1054b9c2d8a..1ba583ef6e03 100644
> --- a/include/linux/stmmac.h
> +++ b/include/linux/stmmac.h
> @@ -28,14 +28,14 @@
>    * This could also be configured at run time using CPU freq framework. */
>   
>   /* MDC Clock Selection define*/
> -#define	STMMAC_CSR_60_100M	0x0	/* MDC = clk_scr_i/42 */
> -#define	STMMAC_CSR_100_150M	0x1	/* MDC = clk_scr_i/62 */
> -#define	STMMAC_CSR_20_35M	0x2	/* MDC = clk_scr_i/16 */
> -#define	STMMAC_CSR_35_60M	0x3	/* MDC = clk_scr_i/26 */
> -#define	STMMAC_CSR_150_250M	0x4	/* MDC = clk_scr_i/102 */
> -#define	STMMAC_CSR_250_300M	0x5	/* MDC = clk_scr_i/124 */
> -#define	STMMAC_CSR_300_500M	0x6	/* MDC = clk_scr_i/204 */
> -#define	STMMAC_CSR_500_800M	0x7	/* MDC = clk_scr_i/324 */
> +#define	STMMAC_CSR_60_100M	0x0	/* MDC = clk_csr_i/42 */
> +#define	STMMAC_CSR_100_150M	0x1	/* MDC = clk_csr_i/62 */
> +#define	STMMAC_CSR_20_35M	0x2	/* MDC = clk_csr_i/16 */
> +#define	STMMAC_CSR_35_60M	0x3	/* MDC = clk_csr_i/26 */
> +#define	STMMAC_CSR_150_250M	0x4	/* MDC = clk_csr_i/102 */
> +#define	STMMAC_CSR_250_300M	0x5	/* MDC = clk_csr_i/124 */
> +#define	STMMAC_CSR_300_500M	0x6	/* MDC = clk_csr_i/204 */
> +#define	STMMAC_CSR_500_800M	0x7	/* MDC = clk_csr_i/324 */
>   
>   /* MTL algorithms identifiers */
>   #define MTL_TX_ALGORITHM_WRR	0x0