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Message-ID:
 <SI2PR01MB43933B0E7155F1858ABF5498DC9BA@SI2PR01MB4393.apcprd01.prod.exchangelabs.com>
Date: Tue, 3 Feb 2026 17:59:35 +0800
From: Wei Wang <wei.w.wang@...mail.com>
To: Jason Gunthorpe <jgg@...dia.com>
Cc: bhelgaas@...gle.com, akpm@...ux-foundation.org, bp@...en8.de,
 rdunlap@...radead.org, alex@...zbot.org, kevin.tian@...el.com,
 linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: Re: [PATCH v3 2/2] PCI: Add the enhanced ACS controls check to
 pci_acs_flags_enabled()



On 2/3/26 12:03 AM, Jason Gunthorpe wrote:
> On Mon, Feb 02, 2026 at 07:33:35PM +0800, Wei Wang wrote:
>> +static bool pci_acs_ecap_enabled(struct pci_dev *pdev, u16 ctrl)
>> +{
>> +	struct pci_dev *usp_pdev = pci_upstream_bridge(pdev);
>> +	u16 mask = PCI_ACS_DMAC_RB | PCI_ACS_DMAC_RR;
>> +
>> +	/*
>> +	 * For ACS DSP/USP Memory Target Access Control, either Request
>> +	 * Redirect or Request Blocking must be enabled to enforce isolation.
>> +	 * According to PCIe spec 7.0, the DSP Memory Target Access is
>> +	 * applicable to both Root Ports and Switch Upstream Ports that have
>> +	 * applicable Memory BAR space to protect. So if the device does not
>> +	 * have a Memory BAR, it skips the check.
>> +	 */
>> +	if (pci_dev_has_memory_bars(pdev) &&
>> +	    (ctrl & mask) != PCI_ACS_DMAC_RB &&
>> +	    (ctrl & mask) != PCI_ACS_DMAC_RR)
>> +		return false;
>> +
>> +	mask = PCI_ACS_UMAC_RB | PCI_ACS_UMAC_RR;
>> +	/*
>> +	 * The USP Memory Target Access is only applicable to downstream ports
>> +	 * that have applicable Memory BAR space in the Switch Upstream Port to
>> +	 * protect. Root Ports, which have usp_pdev set to NULL, will skip the
>> +	 * check.
>> +	 */
>> +	if (usp_pdev && pci_dev_has_memory_bars(usp_pdev) &&
>> +	    (ctrl & mask) != PCI_ACS_UMAC_RB &&
>> +	    (ctrl & mask) != PCI_ACS_UMAC_RR)
>> +		return false;
> 
> I'm not sure about using this logic to detect a USP, it would be
> better to drive it off PCI_EXP_TYPE_DOWNSTREAM

Right. My thought was that only Root Ports and Downstream Ports reach 
this path, and only Downstream Ports have a valid usp_pdev, so it worked 
as an implicit DSP check.

Using the pcie type directly seems clearer. I’ll add:
bool is_dsp = pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM;


> 
> Everything else looks OK though
> 
> Jason


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