linux-kernel - Re: [PATCH 1/2] x86/ioapic: Add NMI delivery configuration helper

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Message-ID: <87ldha3zs5.ffs@tglx>
Date: Tue, 03 Feb 2026 11:08:26 +0100
From: Thomas Gleixner <tglx@...nel.org>
To: Alexander Graf <graf@...zon.com>, x86@...nel.org
Cc: linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org, Clemens
 Ladisch <clemens@...isch.de>, Arnd Bergmann <arnd@...db.de>, Greg
 Kroah-Hartman <gregkh@...uxfoundation.org>, Dave Hansen
 <dave.hansen@...ux.intel.com>, Borislav Petkov <bp@...en8.de>, Ingo Molnar
 <mingo@...hat.com>, Jonathan Corbet <corbet@....net>, Paolo Bonzini
 <pbonzini@...hat.com>, Pasha Tatashin <pasha.tatashin@...een.com>,
 nh-open-source@...zon.com, Nicolas Saenz
 Julienne <nsaenz@...zon.es>, Hendrik Borghorst <hborghor@...zon.de>,
 Filippo
 Sironi <sironi@...zon.de>, David Woodhouse <dwmw@...zon.co.uk>, Jan
 Schönherr <jschoenh@...zon.de>
Subject: Re: [PATCH 1/2] x86/ioapic: Add NMI delivery configuration helper

On Mon, Feb 02 2026 at 17:48, Alexander Graf wrote:
> To implement an HPET based NMI watchdog, the HPET code will need to
> reconfigure an IOAPIC pin to NMI mode. Add a function that allows driver
> code to configure an IOAPIC pin for NMI delivery mode.

A function which violates all layering of the interrupt hierarchy...

> +/**
> + * ioapic_set_nmi - Configure an IOAPIC pin for NMI delivery
> + * @gsi: Global System Interrupt number
> + * @broadcast: true to broadcast to all CPUs, false to send to CPU 0 only
> + *
> + * Configures the specified GSI for NMI delivery mode.
> + *
> + * Returns 0 on success, negative error code on failure.
> + */
> +int ioapic_set_nmi(u32 gsi, bool broadcast)
> +{
> +	struct IO_APIC_route_entry entry = { };
> +	int ioapic_idx, pin;
> +
> +	ioapic_idx = mp_find_ioapic(gsi);
> +	if (ioapic_idx < 0)
> +		return -ENODEV;
> +
> +	pin = mp_find_ioapic_pin(ioapic_idx, gsi);
> +	if (pin < 0)
> +		return -ENODEV;
> +
> +	entry.delivery_mode = APIC_DELIVERY_MODE_NMI;
> +	entry.destid_0_7 = broadcast ? 0xFF : boot_cpu_physical_apicid;
> +	entry.dest_mode_logical = 0;
> +	entry.masked = 0;
> +
> +	ioapic_write_entry(ioapic_idx, pin, entry);

Q: How is that supposed to work with interrupt remapping?
A: Not at all.

Thanks,

        tglx