linux-kernel - Re: [PATCH] drivers/perf: riscv: Keep the fixed counter counting

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Message-Id: <0E982A8E-9CD2-4712-AC59-56D7CA043A2A@bytedance.com>
Date: Wed, 4 Feb 2026 21:13:53 +0800
From: qingwei hu <huqingwei.kernel@...il.com>
To: Atish Patra <atish.patra@...ux.dev>
Cc: cp0613@...ux.alibaba.com,
 anup@...infault.org,
 alex@...ti.fr,
 pjw@...nel.org,
 guoren@...nel.org,
 linux-riscv@...ts.infradead.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drivers/perf: riscv: Keep the fixed counter counting

> On Feb 4, 2026, at 17:17, Atish Patra <atish.patra@...ux.dev> wrote:
> 
> 
> On 1/31/26 3:24 AM, cp0613@...ux.alibaba.com wrote:
>> From: Chen Pei <cp0613@...ux.alibaba.com>
>> 
>> The RISC-V SBI PMU driver disables all PMU counters during initialization
>> via pmu_sbi_stop_all. For fixed counters CYCLE, TIME and INSTRET, this is
>> unnecessary for the following two reasons:
>> 
>> 1. Some kernel driver code may directly read CYCLE and INSTRET to perform
>>    simple performance analysis.
> 
> Is this for some debugging purpose to read the instret/cycle count at boot time or real use case for driver performance analysis ?
> 
> If it is the latter, that will be problematic for various reasons such as context switching will lead to inaccurate numbers.

Hello Atish.

Besides boot time scenarios and performance analysis, there is another case
where user mode needs to access the cycle counter via rdcycle.

> 
>> 2. In legacy mode, user space directly reads CYCLE and INSTRET. (echo 2 >
>>    /proc/sys/kernel/perf_user_access)
>> 
>> Therefore, We keep counting CYCLE, TIME and INSTRET.
>> 
>> Signed-off-by: Chen Pei <cp0613@...ux.alibaba.com>
>> ---
>>  drivers/perf/riscv_pmu_sbi.c | 3 +++
>>  1 file changed, 3 insertions(+)
>> 
>> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
>> index 7dd282da67ce..93aaab324443 100644
>> --- a/drivers/perf/riscv_pmu_sbi.c
>> +++ b/drivers/perf/riscv_pmu_sbi.c
>> @@ -899,6 +899,9 @@ static int pmu_sbi_get_ctrinfo(int nctr, unsigned long *mask)
>>    static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu)
>>  {
>> + /* We keep counting CYCLE, TIME and INSTRET. */
>> + pmu->cmask &= ~0x7;
>> +
> 
> This is incorrect. The cmask should be set based on the perf_user_access value. We should not continue counting the CYCLE/INSTRET when legacy mode is not set. if (sysctl_perf_user_access == SYSCTL_LEGACY) csr_write(CSR_SCOUNTEREN, 0x7); else csr_write(CSR_SCOUNTEREN, 0x2);

Legacy mode refers to the perf framework. When perf_user_access is not in
legacy mode, the application may need to use rdcycle.

As discussed in [1], the rdcycle is necessary, and applications such as
DPDK should use rdcycle in user mode.

So how to use the rdcycle when perf_user_access is not in legacy mode?

[1] https://lists.riscv.org/g/tech-privileged/topic/should_rdcycle_be_deprecated/115162737

Best Regards,
Qingwei Hu

> 
>>   /*
>>    * No need to check the error because we are disabling all the counters
>>    * which may include counters that are not enabled yet.
> 
> _______________________________________________
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> linux-riscv@...ts.infradead.org
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