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Message-ID: <20260204164333.1146039-2-florian.fainelli@broadcom.com>
Date: Wed, 4 Feb 2026 08:43:31 -0800
From: Florian Fainelli <florian.fainelli@...adcom.com>
To: linux-kernel@...r.kernel.org
Cc: Florian Fainelli <florian.fainelli@...adcom.com>,
Linus Walleij <linusw@...nel.org>,
Andy Shevchenko <andy@...nel.org>,
Doug Berger <opendmb@...il.com>,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Bartosz Golaszewski <brgl@...nel.org>,
Andy Shevchenko <andy.shevchenko@...il.com>,
Christophe Leroy <chleroy@...nel.org>,
linux-gpio@...r.kernel.org (open list:GPIO SUBSYSTEM),
linux-arm-kernel@...ts.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE)
Subject: [PATCH v5 1/3] gpio: brcmstb: Utilize irqd_to_hwirq(d) instead of d->hwirq
Consistently use irqd_to_hwirq(d) which is the recommended helper to
fetch the hardware IRQ number from an irq_data structure. While at it,
update the brcmstb_gpio_set_imask() function signature to use the proper
type for the "hwirq" argument rather than "unsigned int".
Reviewed-by: Linus Walleij <linusw@...nel.org>
Reviewed-by: Andy Shevchenko <andy@...nel.org>
Signed-off-by: Florian Fainelli <florian.fainelli@...adcom.com>
---
drivers/gpio/gpio-brcmstb.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
index 2352d099709c..4c35ed664f65 100644
--- a/drivers/gpio/gpio-brcmstb.c
+++ b/drivers/gpio/gpio-brcmstb.c
@@ -96,7 +96,7 @@ static int brcmstb_gpio_hwirq_to_offset(irq_hw_number_t hwirq,
}
static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
- unsigned int hwirq, bool enable)
+ irq_hw_number_t hwirq, bool enable)
{
struct brcmstb_gpio_priv *priv = bank->parent_priv;
u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(hwirq, bank));
@@ -132,7 +132,7 @@ static void brcmstb_gpio_irq_mask(struct irq_data *d)
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
- brcmstb_gpio_set_imask(bank, d->hwirq, false);
+ brcmstb_gpio_set_imask(bank, irqd_to_hwirq(d), false);
}
static void brcmstb_gpio_irq_unmask(struct irq_data *d)
@@ -140,7 +140,7 @@ static void brcmstb_gpio_irq_unmask(struct irq_data *d)
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
- brcmstb_gpio_set_imask(bank, d->hwirq, true);
+ brcmstb_gpio_set_imask(bank, irqd_to_hwirq(d), true);
}
static void brcmstb_gpio_irq_ack(struct irq_data *d)
@@ -148,7 +148,7 @@ static void brcmstb_gpio_irq_ack(struct irq_data *d)
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
struct brcmstb_gpio_priv *priv = bank->parent_priv;
- u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(d->hwirq, bank));
+ u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(irqd_to_hwirq(d), bank));
gpio_generic_write_reg(&bank->chip,
priv->reg_base + GIO_STAT(bank->id), mask);
@@ -159,7 +159,7 @@ static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
struct brcmstb_gpio_priv *priv = bank->parent_priv;
- u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(d->hwirq, bank));
+ u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(irqd_to_hwirq(d), bank));
u32 edge_insensitive, iedge_insensitive;
u32 edge_config, iedge_config;
u32 level, ilevel;
@@ -236,7 +236,7 @@ static int brcmstb_gpio_irq_set_wake(struct irq_data *d, unsigned int enable)
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
struct brcmstb_gpio_priv *priv = bank->parent_priv;
- u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(d->hwirq, bank));
+ u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(irqd_to_hwirq(d), bank));
/*
* Do not do anything specific for now, suspend/resume callbacks will
--
2.43.0
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