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Message-ID: <20260204174237.2906-3-srinivas.kandagatla@oss.qualcomm.com>
Date: Wed, 4 Feb 2026 12:42:37 -0500
From: Srinivas Kandagatla <srinivas.kandagatla@....qualcomm.com>
To: andersson@...nel.org
Cc: linusw@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, konradybcio@...nel.org, srini@...nel.org,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Srinivas Kandagatla <srinivas.kandagatla@....qualcomm.com>
Subject: [PATCH 2/2] arm64: dts: qcom: monaco: add dt entry for lpass lpi pinctrl
Add LPASS LPI pinctrl node used for setting MI2S and soundwire pin
configs.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@....qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 5d2df4305d1c..e1ea94d2f0f3 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -20,6 +20,7 @@
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,gpr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -2866,6 +2867,21 @@ q6prmcc: clock-controller {
};
};
+ lpass_tlmm: pinctrl@...0000 {
+ compatible = "qcom,qcs8300-lpass-lpi-pinctrl",
+ "qcom,sm8450-lpass-lpi-pinctrl";
+ reg = <0x0 0x03440000 0x0 0x20000>,
+ <0x0 0x034D0000 0x0 0x10000>;
+
+ clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "core", "audio";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&lpass_tlmm 0 0 23>;
+ };
+
lpass_ag_noc: interconnect@...0000 {
compatible = "qcom,qcs8300-lpass-ag-noc";
reg = <0x0 0x03c40000 0x0 0x17200>;
--
2.47.3
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