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Message-ID: <177016325730.569059.4869595783649901022.b4-ty@google.com>
Date: Tue, 3 Feb 2026 16:10:21 -0800
From: Sean Christopherson <seanjc@...gle.com>
To: Sean Christopherson <seanjc@...gle.com>, Paolo Bonzini <pbonzini@...hat.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
Mathias Krause <minipli@...ecurity.net>, John Allen <john.allen@....com>,
Rick Edgecombe <rick.p.edgecombe@...el.com>, Chao Gao <chao.gao@...el.com>,
Binbin Wu <binbin.wu@...ux.intel.com>, Xiaoyao Li <xiaoyao.li@...el.com>,
Jim Mattson <jmattson@...gle.com>
Subject: Re: [PATCH v2 0/3] KVM: x86: CET vs. nVMX fix and hardening
On Tue, 27 Jan 2026 17:43:07 -0800, Sean Christopherson wrote:
> Fix a bug where KVM will clear IBT and SHSTK bits after nested VMX MSRs
> have been configured, e.g. if the kernel is built with CONFIG_X86_CET=y
> but CONFIG_X86_KERNEL_IBT=n. The late clearing results in kvm-intel.ko
> refusing to load as the CPU compatible checks generate their VMCS configs
> with IBT=n and SHSTK=n, ultimately causing a mismatch on the CET entry
> and exit controls.
>
> [...]
This got a bit messy, as I want to get the immediate fix into 6.19 (hopefully
I wasn't too late), and at that point there was no reason to shove the VMCS
patch in with the kvm_cpu_caps hardening.
Applied patch 1 to "fixes", patch 2 to "misc", and patch 3 to "vmx.
[1/3] KVM: x86: Explicitly configure supported XSS from {svm,vmx}_set_cpu_caps()
https://github.com/kvm-x86/linux/commit/f8ade833b733
[2/3] KVM: x86: Harden against unexpected adjustments to kvm_cpu_caps
https://github.com/kvm-x86/linux/commit/3f2757dbf32a
[3/3] KVM: VMX: Print out "bad" offsets+value on VMCS config mismatch
https://github.com/kvm-x86/linux/commit/c0d6b8bbbced
--
https://github.com/kvm-x86/linux/tree/next
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