linux-kernel - [PATCH 2/2] riscv: smp: Clarify comment "cache" -> "instruction cache"

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Message-Id: <20260204-riscv-smp-comment-update-2026-01-v1-2-8b77aa181530@iscas.ac.cn>
Date: Wed, 04 Feb 2026 11:20:34 +0800
From: Vivian Wang <wangruikang@...as.ac.cn>
To: Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>, 
 Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>, 
 Ingo Molnar <mingo@...nel.org>, Valentin Schneider <vschneid@...hat.com>, 
 Peter Zijlstra <peterz@...radead.org>, 
 Samuel Holland <samuel.holland@...ive.com>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
 Palmer Dabbelt <palmer@...osinc.com>, Vivian Wang <wangruikang@...as.ac.cn>
Subject: [PATCH 2/2] riscv: smp: Clarify comment "cache" -> "instruction
 cache"

local_flush_icache_all() only flushes and synchronizes the *instruction*
cache, not the data cache. Since RISC-V does have a cbo.flush
instruction for data cache flush, clarify the comment to avoid
confusion.

Fixes: 58661a30f1bc ("riscv: Flush the instruction cache during SMP bringup")
Signed-off-by: Vivian Wang <wangruikang@...as.ac.cn>
---
 arch/riscv/kernel/smpboot.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 0e6fe20c69a2..8b628580fe11 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -251,8 +251,8 @@ asmlinkage __visible void smp_callin(void)
 	set_cpu_online(curr_cpuid, true);
 
 	/*
-	 * Remote cache and TLB flushes are ignored while the CPU is offline,
-	 * so flush them both right now just in case.
+	 * Remote instruction cache and TLB flushes are ignored while the CPU
+	 * is offline, so flush them both right now just in case.
 	 */
 	local_flush_icache_all();
 	local_flush_tlb_all();

-- 
2.52.0