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Message-ID: <aYKq4qlgCDo42rnw@inochi.infowork>
Date: Wed, 4 Feb 2026 10:14:47 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>,
Inochi Amaoto <inochiama@...il.com>
Cc: Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Yixun Lan <dlan@...too.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>, Alexandre Torgue <alexandre.torgue@...s.st.com>,
Richard Cochran <richardcochran@...il.com>, Paul Walmsley <pjw@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>, Yanteng Si <siyanteng@...oftware.com.cn>,
Yao Zi <ziyao@...root.org>, Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Shangjuan Wei <weishangjuan@...incomputing.com>, Maxime Chevallier <maxime.chevallier@...tlin.com>,
Chen-Yu Tsai <wens@...nel.org>, Zhi Li <lizhi2@...incomputing.com>,
Boon Khai Ng <boon.khai.ng@...era.com>, Quentin Schulz <quentin.schulz@...rry.de>,
Giuseppe Cavallaro <peppe.cavallaro@...com>, Jose Abreu <joabreu@...opsys.com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
spacemit@...ts.linux.dev, linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH net-next v4 3/3] net: stmmac: Add glue layer for Spacemit
K3 SoC
On Tue, Feb 03, 2026 at 05:48:00PM +0000, Russell King (Oracle) wrote:
> On Fri, Jan 30, 2026 at 10:27:04AM +0800, Inochi Amaoto wrote:
> > +/* ctrl register bits */
> > +#define CTRL_PHY_INTF_RGMII BIT(3)
> > +#define CTRL_PHY_INTF_MII BIT(4)
> > +#define CTRL_WAKE_IRQ_EN BIT(9)
> > +#define CTRL_PHY_IRQ_EN BIT(12)
>
> Thanks for updating these.
>
> > +static int spacemit_dwmac_update_ifconfig(struct plat_stmmacenet_data *plat_dat,
> > + struct stmmac_resources *stmmac_res,
> > + struct regmap *apmu,
> > + unsigned int ctrl_offset)
> > +{
> > + unsigned int mask = CTRL_PHY_INTF_MII | CTRL_PHY_INTF_RGMII | CTRL_WAKE_IRQ_EN;
> > + unsigned int val = 0;
> > +
> > + switch (plat_dat->phy_interface) {
> > + case PHY_INTERFACE_MODE_MII:
> > + val = CTRL_PHY_INTF_MII;
> > + break;
> > +
> > + case PHY_INTERFACE_MODE_RMII:
> > + break;
> > +
> > + case PHY_INTERFACE_MODE_RGMII:
> > + case PHY_INTERFACE_MODE_RGMII_ID:
> > + case PHY_INTERFACE_MODE_RGMII_RXID:
> > + case PHY_INTERFACE_MODE_RGMII_TXID:
> > + val = CTRL_PHY_INTF_RGMII;
> > + break;
> > +
> > + default:
> > + return -EOPNOTSUPP;
> > + }
> > +
> > + if (stmmac_res->wol_irq >= 0)
> > + val |= CTRL_WAKE_IRQ_EN;
> > +
> > + return regmap_update_bits(apmu, ctrl_offset, mask, val);
>
> I would suggest that this is split into two parts - first, this is
> renamed and reduced to just controlling CTRL_WAKE_IRQ_EN.
>
> Next, a function hooked into plat_dat->set_phy_intf_sel which sets
> the CTRL_PHY_INTF_RGMII and CTRL_PHY_INTF_MII bits as appropriate.
> Note that this function is passed the dwmac's own phy_intf_sel
> value from common.h which will be PHY_INTF_SEL_GMII_MII,
> PHY_INTF_SEL_RGMII or PHY_INTF_SEL_RMII for you.
>
> It would also be good to have plat_dat->get_interfaces populated
> using phy_interface_set_rgmii(), and __set_bit(PHY_INTERFACE_MODE_MII)
> and __set_bit(PHY_INTERFACE_MODE_RMII) to indicate to phylink which
> interface modes are permissable.
>
> Thanks.
>
> --
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
Thanks for your detailed guide, I will try to switch to these helper
apis in the next version.
Regards,
Inochi
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