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Message-ID: <3ed170d0-3291-4cfb-b092-f4a1b2b0f96b@oss.qualcomm.com>
Date: Wed, 4 Feb 2026 13:24:45 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: george.moussalem@...look.com,
        Uwe Kleine-König
 <ukleinek@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>, Baruch Siach <baruch@...s.co.il>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-pwm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Devi Priya <quic_devipriy@...cinc.com>,
        Baruch Siach
 <baruch.siach@...lu.com>,
        Krzysztof Kozlowski <krzk@...nel.org>
Subject: Re: [PATCH v20 3/6] arm64: dts: qcom: ipq6018: add pwm node

On 2/4/26 12:25 PM, George Moussalem via B4 Relay wrote:
> From: Devi Priya <quic_devipriy@...cinc.com>
> 
> Describe the PWM block on IPQ6018.
> 
> Although PWM is in the TCSR area, make pwm its own node as simple-mfd
> has been removed from the bindings and as such hardware components
> should have its own node.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Co-developed-by: Baruch Siach <baruch.siach@...lu.com>
> Signed-off-by: Baruch Siach <baruch.siach@...lu.com>
> Signed-off-by: Devi Priya <quic_devipriy@...cinc.com>
> Signed-off-by: George Moussalem <george.moussalem@...look.com>
> ---
>  arch/arm64/boot/dts/qcom/ipq6018.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index 40f1c262126eff3761430a47472b52d27f961040..7866844cc09fd2c2c2f512ce2c8fa7826fabc7aa 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -413,6 +413,16 @@ tcsr: syscon@...7000 {
>  			reg = <0x0 0x01937000 0x0 0x21000>;
>  		};
>  
> +		pwm: pwm@...1010 {
> +			compatible = "qcom,ipq6018-pwm";
> +			reg = <0x0 0x01941010 0x0 0x20>;
> +			clocks = <&gcc GCC_ADSS_PWM_CLK>;
> +			assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
> +			assigned-clock-rates = <100000000>;
> +			#pwm-cells = <3>;
> +			status = "disabled";

I don't think there's a reason to disable it by default, but given the
version this patchset is on, I'll be happy to see a post-merge fixup

Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>

Konrad

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