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<VI0PR04MB121140E20877D9673D20CF3679299A@VI0PR04MB12114.eurprd04.prod.outlook.com>
Date: Thu, 5 Feb 2026 06:25:25 +0000
From: Sherry Sun <sherry.sun@....com>
To: Frank Li <frank.li@....com>
CC: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>, "festevam@...il.com"
<festevam@...il.com>, "imx@...ts.linux.dev" <imx@...ts.linux.dev>,
"kernel@...gutronix.de" <kernel@...gutronix.de>, "devicetree@...r.kernel.org"
<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH 1/3] arm64: dts: imx8mp-evk: Enable pull select bit for
PCIe regulator GPIO (M.2 W_DISABLE1)
> On Wed, Feb 04, 2026 at 10:32:02AM +0800, Sherry Sun wrote:
> > The current pin configuration for
> MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06
> > sets the weak pull-up but does not enable the pull select field.
> > Bit 8 in the IOMUX register must be set in order for the weak pull-up
> > to actually take effect.
> >
> > Update the pinctrl setting from 0x40 to 0x140 to enable both the pull
> > select and the weak pull-up, ensuring the line behaves as expected.
> >
> > Signed-off-by: Sherry Sun <sherry.sun@....com>
> > ---
>
> Add fixes tag
Ok. Will add in V2. Thanks!
Best Regards
Sherry
>
> Frank
> > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > index 3f9b3fab8ac3..a1269c7a6cc2 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > @@ -1069,7 +1069,7 @@ MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07
> 0x40
> >
> > pinctrl_pcie0_reg: pcie0reggrp {
> > fsl,pins = <
> > - MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40
> > + MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x140
> > >;
> > };
> >
> > --
> > 2.37.1
> >
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