linux-kernel - RE: [PATCH v3 4/4] clk: renesas: r9a08g046: Add clock and reset signals for the GBETH IPs

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Message-ID:
 <TY3PR01MB11346663068916109084975CD8699A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Thu, 5 Feb 2026 08:56:31 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: biju.das.au <biju.das.au@...il.com>, Geert Uytterhoeven
	<geert+renesas@...der.be>, Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>
CC: "linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Prabhakar
 Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>, biju.das.au
	<biju.das.au@...il.com>
Subject: RE: [PATCH v3 4/4] clk: renesas: r9a08g046: Add clock and reset
 signals for the GBETH IPs

Hi all,

> -----Original Message-----
> From: Biju <biju.das.au@...il.com>
> Sent: 03 February 2026 11:02
> Subject: [PATCH v3 4/4] clk: renesas: r9a08g046: Add clock and reset signals for the GBETH IPs
> 
> From: Biju Das <biju.das.jz@...renesas.com>
> 
> Add clock and reset entries for the Gigabit Ethernet Interfaces (GBETH 0-1) IPs found on the RZ/G3L
> SoC. This includes various dividers and mux clocks needed by these two GBETH IPs.
> 
> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> ---
> v2->v3:
>  * Added eth{0,1}_{tx,rx}_i_rmii clocks.

Since, this clock list are part of PM domain, PM framework will
turn on all the clocks. So, on the next version I am planning to add
tx, tx-180, rx, rx-180, rmii, rmii-tx and rmii-rx clocks to
r9a08g046_no_pm_mod_clk table to avoid enabling both normal and rmii
clocks by the PM framework.

Currently, Renesas ethernet glue driver supports only RGMII mode clocks.

On future, the ethernet glue driver will have 2 LUT's one for normal mode and other
for rmii mode that select the table based on the mode of operation.

Geert, please correct me if this approach is wrong.

Cheers,
Biju