linux-kernel - Re: [PATCH] MIPS: Loongson64: env: Fixup serial clock-frequency when using LEFI

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Message-ID: <aYRdhLOAZN21VIwc@alpha.franken.de>
Date: Thu, 5 Feb 2026 10:06:12 +0100
From: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
To: Yao Zi <me@...ao.cc>
Cc: Huacai Chen <chenhuacai@...nel.org>,
	Jiaxun Yang <jiaxun.yang@...goat.com>, linux-mips@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MIPS: Loongson64: env: Fixup serial clock-frequency when
 using LEFI

On Mon, Feb 02, 2026 at 04:53:22AM +0000, Yao Zi wrote:
> When booting from LEFI firmware, the devicetree is chosen by matching
> bridge type and CPU PRID. However, serials on Loongson devices may not
> have the same clock frequency across different boards. For example,
> CPU UARTs found on Loongson 3A4000 is supplied by the system clock,
> which may be either 25MHz or 100MHz.
> 
> Luckily, LEFI firmware interface provides information about UART
> address and corresponding clock frequency. Let's fixup clock-frequency
> properties for serials after FDT selection by matching FDT nodes with
> addresses provided by firmware.
> 
> Signed-off-by: Yao Zi <me@...ao.cc>
> ---
> 
> This is tested on LS3A4000_7A1000_NUC_BOARD_V2.1, which utilizes a 25MHz
> oscillator as system clock input. Without the patch, serial output is
> completely broken after kernel initialization.
> 
>  arch/mips/loongson64/env.c | 98 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 98 insertions(+)

applied to mips-next
Thomas.

-- 
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