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Message-ID: <20260205-phy-intel-lgm-combo-v1-1-dc6e58919585@dev.tdt.de>
Date: Thu, 05 Feb 2026 13:02:11 +0100
From: Florian Eckert <fe@....tdt.de>
To: Vinod Koul <vkoul@...nel.org>,
	Neil Armstrong <neil.armstrong@...aro.org>,
	Dilip Kota <eswara.kota@...ux.intel.com>
Cc: linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Florian Eckert <Eckert.Florian@...il.com>,
	Florian Eckert <fe@....tdt.de>
Subject: [PATCH] phy: intel: phy-intel-lgm-combo: Add missing boot trigger

In the current implementation, the PHY firmware is not started on the LGM.
The PCIe RC cannot establish a connection to the PCIe EP via LTSSM, because
the PCIe RC on the PHY is never started. Setting the bit 1 in the
PCIE_PHY_SRAM_CSR app register boots the PHY firmware.

This changes are based on patched kernel sources of the MaxLinear SDK,
which can be found at https://github.com/maxlinear/linux

Signed-off-by: Florian Eckert <fe@....tdt.de>
---
 drivers/phy/intel/phy-intel-lgm-combo.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/phy/intel/phy-intel-lgm-combo.c b/drivers/phy/intel/phy-intel-lgm-combo.c
index 9ee3cf61cdd00439f6a9b76c715aec0fa95c8a15..61690d418a5632d4b0c685116a443edba1fe8363 100644
--- a/drivers/phy/intel/phy-intel-lgm-combo.c
+++ b/drivers/phy/intel/phy-intel-lgm-combo.c
@@ -24,6 +24,9 @@
 
 #define PAD_DIS_CFG		0x174
 
+#define PCIE_PHY_SRAM_CSR	0x08
+#define PCIE_PHY_SRAM_LD_DONE	BIT(1)
+
 #define PCS_XF_ATE_OVRD_IN_2	0x3008
 #define ADAPT_REQ_MSK		GENMASK(5, 4)
 
@@ -345,6 +348,16 @@ static int intel_cbphy_init(struct phy *phy)
 
 	cbphy->init_cnt++;
 
+	combo_phy_w32_off_mask(cbphy->app_base, PCIE_PHY_SRAM_CSR,
+				PCIE_PHY_SRAM_LD_DONE,
+				FIELD_PREP(PCIE_PHY_SRAM_LD_DONE, 1));
+
+	mutex_unlock(&cbphy->lock);
+
+	/* 15ms is required for the FW to take effect after load */
+	mdelay(15);
+	return 0;
+
 err:
 	mutex_unlock(&cbphy->lock);
 

---
base-commit: 18f7fcd5e69a04df57b563360b88be72471d6b62
change-id: 20260205-phy-intel-lgm-combo-d79252514393

Best regards,
-- 
Florian Eckert <fe@....tdt.de>


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