linux-kernel - Re: [RFC 2/2] pci: Add PCI capability infrastructure and SR-IOV capability support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-Id: <DG71X1RAJCVY.LJADBXREZ4XD@garyguo.net>
Date: Thu, 05 Feb 2026 13:10:15 +0000
From: "Gary Guo" <gary@...yguo.net>
To: "Zhi Wang" <zhiw@...dia.com>, "Gary Guo" <gary@...yguo.net>
Cc: <rust-for-linux@...r.kernel.org>, <linux-pci@...r.kernel.org>,
 <linux-kernel@...r.kernel.org>, <dakr@...nel.org>, <aliceryhl@...gle.com>,
 <bhelgaas@...gle.com>, <kwilczynski@...nel.org>, <ojeda@...nel.org>,
 <alex.gaynor@...il.com>, <boqun.feng@...il.com>,
 <bjorn3_gh@...tonmail.com>, <lossin@...nel.org>, <a.hindborg@...nel.org>,
 <tmgross@...ch.edu>, <markus.probst@...teo.de>, <helgaas@...nel.org>,
 <cjia@...dia.com>, <smitra@...dia.com>, <ankita@...dia.com>,
 <aniketa@...dia.com>, <kwankhede@...dia.com>, <targupta@...dia.com>,
 <acourbot@...dia.com>, <joelagnelf@...dia.com>, <jhubbard@...dia.com>,
 <zhiwang@...nel.org>, <daniel.almeida@...labora.com>
Subject: Re: [RFC 2/2] pci: Add PCI capability infrastructure and SR-IOV
 capability support

On Thu Feb 5, 2026 at 11:57 AM GMT, Zhi Wang wrote:
> On Tue, 27 Jan 2026 15:36:29 +0000
> "Gary Guo" <gary@...yguo.net> wrote:
>
> snip
>
>> > +/// Marker for normal (legacy) PCI capabilities.
>> > +impl CapabilityKind for Normal {
>> > +    type IdType = u8;
>> > +    const START_OFFSET: usize = bindings::PCI_CAPABILITY_LIST as
>> > usize; +}
>> > +
>> > +/// Marker for extended PCI capabilities.
>> > +impl CapabilityKind for Extended {
>> > +    type IdType = u16;
>> > +    const START_OFFSET: usize = bindings::PCI_CFG_SPACE_SIZE as
>> > usize; +}
>> > +
>> > +/// A PCI capability.
>> > +///
>> > +/// This type represents a discovered PCI capability and provides
>> > safe access +/// to its registers. All I/O operations are relative
>> > to the capability's +/// base offset in configuration space.
>> > +pub struct Capability<'a, S: ConfigSpaceKind, K: CapabilityKind> {
>> > +    config_space: &'a ConfigSpace<'a, S>,
>> > +    offset: usize,
>> > +    id: K::IdType,
>> > +    size: usize,
>> > +}
>> 
>> Some thoughts about this: given that the IDs are different for PCI
>> capability and PCI extended capabilities, it feels that we shouldn't
>> overlap them into the same type.
>> 
>
> Make sense. Sorry for the late reply as I was evaluating what would be
> the impact of IoCapable trait refinement to this patch.

There's a few discussions about this recently and I think we've determined a
generic infrastrucutre for a subview of a I/O region is desired. I'm going to
work on this in the upcoming weeks and would report my progress on Zulip. Let's
coordinate there.

>
>> The `offset` and `size` feels like it can be something more generic,
>> something like
>> 
>>     /// A subview into I/O.
>>     pub struct IoView<T> {
>>         io: T,
>>         offset: usize,
>>         size: usize,
>>     }
>> 
>>     impl<T: IO> IoView<T> {
>>         // ....
>>     }
>> 
>> This is just like a slice, but act on arbitrary IO.
>> 
>> The capability enumeration can just be something like
>> 
>>     fn capabilities(&self) -> impl Iterator<Item = (CapabilityId,
>> IoView<&Self>)>
>> 
>> and another method for capabilities_ext.
>> 
>
> I actually had a version of that, but dropped it. The C side already
> handles finding capabilities by ID, so a Rust iterator seemed redundant
> for the common case. Unless we need to handle multiple capabilities
> with the same ID (which is rare). IMO, it might be better we add it when
> a rust driver really need this.

If we're not going to expose any API that support enumeration at all, then what
you say makes sense.

>
>> If you want to add typed capabilities, an option is to have
>> 
>>     enum Capability<'a> {
>>         SpecificParsedCapability,
>>         Other(CapabilityId, IoView<&ConfigSpace<...>>),
>>     }
>> 
>
> But given that the kernel's C API favors looking up by ID, usage of an
> enum might be slightly awkward here (e.g., calling find_capability(ID)
> and still having to unwrap an enum)?

Indeed. What you have there makes sense for typed capability lookup.

Best,
Gary