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Message-ID: <20260205-polar-gifted-lionfish-ef8a8d@quoll>
Date: Thu, 5 Feb 2026 14:39:09 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Biju <biju.das.au@...il.com>
Cc: Thomas Gleixner <tglx@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>,
Biju Das <biju.das.jz@...renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH v2 2/9] dt-bindings: interrupt-controller:
renesas,rzg2l-irqc: Document RZ/G3L SoC
On Wed, Feb 04, 2026 at 06:06:18PM +0000, Biju wrote:
> From: Biju Das <biju.das.jz@...renesas.com>
>
> Document RZ/G3L (R9A08G046) IRQC bindings. The IRQC block on RZ/G3L SoC
> is almost identical to one found on the RZ/G3S SoC with the difference
> like it support more External IRQs, GPT Error Interrupts and also has
> additional registers for GPT/MTU IRQ selection, shared IRQ selection
> between external IRQ and TINT. Hence new generic compatible string
> "renesas,r9a08g046-irqc" is added for RZ/G3L SoC.
>
> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> ---
> v1->v2:
> * Simplified the binding using pattern
> ---
> .../renesas,rzg2l-irqc.yaml | 42 +++++++++++++++----
> 1 file changed, 35 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml
> index a0b57d808639..311741122b05 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml
> @@ -30,7 +30,10 @@ properties:
> - renesas,r9a08g045-irqc # RZ/G3S
> - const: renesas,rzg2l-irqc
>
> - - const: renesas,r9a07g043f-irqc # RZ/Five
> + - items:
Drop items. The point was to simplify, so just enum.
> + - enum:
> + - renesas,r9a07g043f-irqc # RZ/Five
> + - renesas,r9a08g046-irqc # RZ/G3L
>
> '#interrupt-cells':
> description: The first cell should contain a macro RZG2L_{NMI,IRQX} included in the
> @@ -48,17 +51,17 @@ properties:
>
> interrupts:
> minItems: 45
> - maxItems: 48
> + maxItems: 61
>
> interrupt-names:
> minItems: 45
> - maxItems: 48
> + maxItems: 61
> items:
> oneOf:
> - description: NMI interrupt
> const: nmi
> - description: External IRQ interrupt
> - pattern: '^irq([0-7])$'
> + pattern: '^irq([0-9]|1[0-5])$'
> - description: GPIO interrupt
> pattern: '^tint([0-9]|1[0-9]|2[0-9]|3[0-1])$'
> - description: Bus error interrupt
> @@ -75,6 +78,8 @@ properties:
> const: ec7tie2-1
> - description: ECCRAM1 error overflow interrupt
> const: ec7tiovf-1
> + - description: Integrated GPT Error interrupt
> + pattern: '^ovfunf([0-7])$'
>
> clocks:
> maxItems: 2
> @@ -106,6 +111,22 @@ required:
> allOf:
> - $ref: /schemas/interrupt-controller.yaml#
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a07g043f-irqc
> + - renesas,r9a07g043u-irqc
> + - renesas,r9a07g044-irqc
> + - renesas,r9a07g054-irqc
> + then:
> + properties:
> + interrupts:
Missing minitems. Previously it was not 45, was it?
> + maxItems: 48
> + interrupt-names:
> + maxItems: 48
> +
> - if:
> properties:
> compatible:
> @@ -118,12 +139,19 @@ allOf:
> maxItems: 45
> interrupt-names:
> maxItems: 45
> - else:
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a08g046-irqc
> + then:
> properties:
> interrupts:
> - minItems: 48
> + maxItems: 61
minItems instead. Just like it was in the old code.
Best regards,
Krzysztof
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