linux-kernel - Re: [PATCH v3 1/2] dt-bindings: mmc: sdhci-msm: Add ICE phandle

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <b6e510da-b369-4c43-b9a1-455478af4948@kernel.org>
Date: Fri, 6 Feb 2026 12:26:48 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Neeraj Soni <neeraj.soni@....qualcomm.com>, ulf.hansson@...aro.org,
 robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 andersson@...nel.org, konradybcio@...nel.org
Cc: linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, Abel Vesa <abel.vesa@...aro.org>,
 Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
Subject: Re: [PATCH v3 1/2] dt-bindings: mmc: sdhci-msm: Add ICE phandle

On 06/02/2026 12:20, Neeraj Soni wrote:
> Starting with sc7280(kodiak), the ICE will have its own device-tree node.
> So add the qcom,ice property to reference it.
> 
> Co-developed-by: Abel Vesa <abel.vesa@...aro.org>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> Co-developed-by: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
> Signed-off-by: Neeraj Soni <neeraj.soni@....qualcomm.com>
> 
> ---
> 
> Some initial work is done by Abel here:
> https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/
> and by Abhinaba here:
> https://lore.kernel.org/all/20251009-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-v1-1-2a34d8d03c72@oss.qualcomm.com/
> 
> This patch adds the purpose and usage for phandle in the description and encodes
> it properly in the schema.
> ---
>  .../devicetree/bindings/mmc/sdhci-msm.yaml    | 26 +++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> index 938be8228d66..f35b675c9f16 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -140,6 +140,12 @@ properties:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description: platform specific settings for DLL_CONFIG reg.
>  
> +  qcom,ice:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: |
> +      phandle to the Inline Crypto Engine node. ICE having its own platform driver will use this phandle to

Please wrap code according to the preferred limit expressed in Kernel
coding style (checkpatch is not a coding style description, but only a
tool).  However don't wrap blindly (see Kernel coding style).

Do not need '|' unless you need to preserve formatting.


I do not understand the platform driver reference here. You are supposed
to explain how the hardware uses it, for what purpose. If I change Linux
to use auxilary driver, then the binding is incorrect?


> +      manage its resources independently. Either add this phandle or ICE address space for ICE to work.

Don't repeat constraints in free form text.

Such trivialities should not happen, I am sometimes skipping deep dive
review, so I skipped the rest.

:


Best regards,
Krzysztof