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Message-ID: <CAD++jLkqpRrcgQ2JvbHJY3NQ=KHi8T91aOg2KvAmkVAXAEzH-A@mail.gmail.com>
Date: Fri, 6 Feb 2026 13:50:21 +0100
From: Linus Walleij <linusw@...nel.org>
To: Billy Tsai <billy_tsai@...eedtech.com>
Cc: Tony Lindgren <tony@...mide.com>, Haojian Zhuang <haojian.zhuang@...aro.org>,
"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
"linux-omap@...r.kernel.org" <linux-omap@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"andrew@...econstruct.com.au" <andrew@...econstruct.com.au>, BMC-SW <BMC-SW@...eedtech.com>
Subject: Re: [PATCH v2 0/3] pinctrl: single: bit-per-mux DT flexibility, probe
robustness, and consistent pinconf offsets
On Fri, Feb 6, 2026 at 12:34 PM Billy Tsai <billy_tsai@...eedtech.com> wrote:
> On Fri, Feb 6, 2026 at 8:24 AM Billy Tsai <billy_tsai@...eedtech.com> wrote:
>
> > > I understand the preference is to keep pinctrl-single minimal and move
> > > the bit-per-mux handling into a separate, more targeted driver built on
> > > top of the GENERIC_PINMUX/GENERIC_PINCONF helpers, rather than extending
> > > pinctrl-single itself.
> > >
> > > Based on that, I’ll look into refactoring this into a
> > > pinctrl-single-bit style driver that covers bit-per-mux / bit-per-pin
> > > layouts generically (including AST2700), while keeping pinctrl-single
> > > focused on the simpler register models.
> > >
> > > One additional point I’d like to raise is the handling of pre-reserved
> > > MMIO regions.
> > >
> > > On AST2700 systems, the SCU register range containing the pinctrl
> > > registers is commonly reserved by a top-level syscon node or by firmware.
> > > In this setup, devm_request_mem_region() can return -EBUSY even though the
> > > registers are valid and intended to be shared, which currently causes the
> > > driver to fail probing and leaves pinmux unconfigured.
> > >
> > > When moving to a separate targeted driver, would the preferred approach
> > > be to treat this condition as a warning and continue probing, or is there
> > > an alternative pattern you’d recommend for handling shared SCU-style
> > > register blocks in pinctrl drivers?
>
> > Can't you just base this entire driver on syscon which uses regmap-mmio
> > to abstract and solve this problem?
>
> > The syscon is entirely designed as a singleton owning all registers
> > and handing them out to subdrivers.
>
> Agreed that syscon/regmap would be ideal. The main issue with
> pinctrl-single is that it is fundamentally MMIO-based: it always
> requests and ioremaps the register range and performs raw MMIO accesses,
> with no regmap integration. Adapting it to act as a syscon consumer would
> require a larger architectural rework of the driver.
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pinctrl/pinctrl-single.c?h=v6.19-rc6#n230
These comments were under the assumtion that you do what Tony & I
suggested and create a completely new driver for these use cases.
Sorry if it was unclear.
Yours,
Linus Walleij
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