linux-kernel - [PATCH 2/8] riscv: hwprobe: Add support for probing B

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Message-Id: <20260207-isa-ext-parse-export-v1-2-a64d3a8bc20a@riscstar.com>
Date: Sat, 07 Feb 2026 18:27:56 +0800
From: Guodong Xu <guodong@...cstar.com>
To: Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>, 
 Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>, 
 Jonathan Corbet <corbet@....net>, Shuah Khan <skhan@...uxfoundation.org>, 
 Conor Dooley <conor@...nel.org>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
 linux-doc@...r.kernel.org, Guodong Xu <guodong@...cstar.com>
Subject: [PATCH 2/8] riscv: hwprobe: Add support for probing B

The B extension is a shorthand for the Zba, Zbb, and Zbs extensions
combined, as defined by version 20240411 of the RISC-V Instruction Set
Manual Volume I Unprivileged Architecture.

The B bit is added as a system-wide check in RISCV_HWPROBE_KEY_IMA_EXT_1
using the global ISA bitmap.

It should be noted that the kernel already exports Zba, Zbb, and Zbs
individually in RISCV_HWPROBE_KEY_IMA_EXT_0 with per-CPU granularity.

Signed-off-by: Guodong Xu <guodong@...cstar.com>
---
 Documentation/arch/riscv/hwprobe.rst  | 4 ++++
 arch/riscv/include/uapi/asm/hwprobe.h | 1 +
 arch/riscv/kernel/sys_hwprobe.c       | 3 +++
 3 files changed, 8 insertions(+)

diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst
index c420a8349bc6811573051154bc9c64617f3d7464..8430bc94fdba073e1e3ded973322c773c598a0b5 100644
--- a/Documentation/arch/riscv/hwprobe.rst
+++ b/Documentation/arch/riscv/hwprobe.rst
@@ -391,3 +391,7 @@ The following keys are defined:
 * :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_1`: A bitmask containing additional
   extensions that are compatible with the
   :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior.
+
+  * :c:macro:`RISCV_HWPROBE_IMA_B`: The B extension is supported, as defined
+    by version 20240411 of the RISC-V Instruction Set Manual, Volume I
+    Unprivileged Architecture.
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index 9139edba0aecbf466098ace486658aaeeb6667e3..e7bd2e9ea33459572d01495f4063e32e3207e48f 100644
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -116,6 +116,7 @@ struct riscv_hwprobe {
 #define RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE	15
 #define RISCV_HWPROBE_KEY_IMA_EXT_1		16
 #define		RISCV_HWPROBE_EXT_ZICFISS	(1ULL << 0)
+#define		RISCV_HWPROBE_IMA_B		(1ULL << 1)
 
 /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
 
diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c
index 1659d31fd288fc296d711c111e8d1a2e2fc8026a..491af3c5b66a0cb30471dafc8b31c70df2f9bed1 100644
--- a/arch/riscv/kernel/sys_hwprobe.c
+++ b/arch/riscv/kernel/sys_hwprobe.c
@@ -191,6 +191,9 @@ static void hwprobe_isa_ext1(struct riscv_hwprobe *pair,
 
 	pair->value = 0;
 
+	if (riscv_isa_extension_available(NULL, b))
+		pair->value |= RISCV_HWPROBE_IMA_B;
+
 	/*
 	 * Loop through and record extensions that 1) anyone has, and 2) anyone
 	 * doesn't have.

-- 
2.43.0