| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <CACRMN=dy3eosPYSne3UKBL+ArOT-pzd3N5k3e7GPwSXJQ=6UwA@mail.gmail.com>
Date: Sat, 7 Feb 2026 17:46:27 -0800
From: Saravana Kannan <saravanak@...nel.org>
To: Ivan Vecera <ivecera@...hat.com>
Cc: netdev@...r.kernel.org, Alexander Lobakin <aleksander.lobakin@...el.com>,
Andrew Lunn <andrew+netdev@...n.ch>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>, Conor Dooley <conor+dt@...nel.org>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Grzegorz Nitka <grzegorz.nitka@...el.com>, Jakub Kicinski <kuba@...nel.org>,
Jiri Pirko <jiri@...nulli.us>, Jonathan Lemon <jonathan.lemon@...il.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Leon Romanovsky <leon@...nel.org>, Mark Bloch <mbloch@...dia.com>,
Michal Schmidt <mschmidt@...hat.com>, Paolo Abeni <pabeni@...hat.com>, Petr Oros <poros@...hat.com>,
Prathosh Satish <Prathosh.Satish@...rochip.com>,
Przemek Kitszel <przemyslaw.kitszel@...el.com>, Richard Cochran <richardcochran@...il.com>,
Rob Herring <robh@...nel.org>, Saeed Mahameed <saeedm@...dia.com>,
Saravana Kannan <saravanak@...nel.org>, Tariq Toukan <tariqt@...dia.com>,
Tony Nguyen <anthony.l.nguyen@...el.com>, Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
devicetree@...r.kernel.org, intel-wired-lan@...ts.osuosl.org,
linux-kernel@...r.kernel.org, linux-rdma@...r.kernel.org
Subject: Re: [PATCH net-next v2 03/12] dpll: Add helpers to find DPLL pin fwnode
On Fri, Jan 16, 2026 at 10:46 AM Ivan Vecera <ivecera@...hat.com> wrote:
>
> dpll: core: add helpers to find DPLL pin fwnode
>
> Add helper functions to the DPLL core to retrieve a DPLL pin's firmware
> node handle based on the 'dpll-pins' and 'dpll-pin-names' properties.
>
> Unlike simple phandle arrays, 'dpll-pins' entries typically contain
> a pin specifier (index and direction) as defined by '#dpll-pin-cells'.
> The new helper fwnode_dpll_pin_node_get() parses these specifiers
> using fwnode_property_get_reference_args(). It resolves the target
> pin by:
> 1. Identifying the DPLL device node from the phandle.
> 2. Selecting the correct sub-node ('input-pins' or 'output-pins') based
> on the direction argument.
> 3. Matching the pin index argument against the 'reg' property of
> the child nodes.
>
> Additionally, register 'dpll-pins' in drivers/of/property.c to enable
> proper parsing of the supplier bindings by the OF core.
>
> Signed-off-by: Ivan Vecera <ivecera@...hat.com>
> ---
> v2:
> * added check for fwnode_property_match_string() return value
> * reworked searching for the pin using dpll device phandle and
> pin specifier
> * added dpll-pins into OF core supplier_bindings
> ---
> drivers/dpll/dpll_core.c | 74 ++++++++++++++++++++++++++++++++++++++++
> drivers/of/property.c | 2 ++
> include/linux/dpll.h | 15 ++++++++
> 3 files changed, 91 insertions(+)
>
> diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c
> index fb68b5e19b480..b0083b5c10aa4 100644
> --- a/drivers/dpll/dpll_core.c
> +++ b/drivers/dpll/dpll_core.c
> @@ -13,6 +13,7 @@
> #include <linux/property.h>
> #include <linux/slab.h>
> #include <linux/string.h>
> +#include <dt-bindings/dpll/dpll.h>
>
> #include "dpll_core.h"
> #include "dpll_netlink.h"
> @@ -654,6 +655,79 @@ struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode)
> }
> EXPORT_SYMBOL_GPL(fwnode_dpll_pin_find);
>
> +/**
> + * fwnode_dpll_pin_node_get - get dpll pin node from given fw node and pin name
> + * @fwnode: firmware node that uses the dpll pin
> + * @name: dpll pin name from dpll-pin-names property
> + *
> + * Return: ERR_PTR() on error or a valid firmware node handle on success.
> + */
> +struct fwnode_handle *fwnode_dpll_pin_node_get(struct fwnode_handle *fwnode,
> + const char *name)
> +{
> + struct fwnode_handle *parent_node, *pin_node;
> + struct fwnode_reference_args args;
> + const char *parent_name;
> + int ret, index = 0;
> +
> + if (name) {
> + index = fwnode_property_match_string(fwnode, "dpll-pin-names",
> + name);
> + if (index < 0)
> + return ERR_PTR(-ENOENT);
> + }
> +
> + ret = fwnode_property_get_reference_args(fwnode, "dpll-pins",
> + "#dpll-pin-cells", 2, index,
> + &args);
> + if (ret)
> + return ERR_PTR(ret);
> +
> + /* We support only 2 cell DPLL bindings in the kernel currently. */
> + if (args.nargs != 2) {
> + fwnode_handle_put(args.fwnode);
> + return ERR_PTR(-ENOENT);
> + }
> +
> + /* Resolve parent node name according pin direction type */
> + switch (args.args[1]) {
> + case DPLL_PIN_INPUT:
> + parent_name = "input-pins";
> + break;
> + case DPLL_PIN_OUTPUT:
> + parent_name = "output-pins";
> + break;
> + default:
> + fwnode_handle_put(args.fwnode);
> + return ERR_PTR(-EINVAL);
> + }
> +
> + /* Get pin's parent sub-node */
> + parent_node = fwnode_get_named_child_node(args.fwnode, parent_name);
> + if (!parent_node) {
> + fwnode_handle_put(args.fwnode);
> + return ERR_PTR(-ENOENT);
> + }
> +
> + /* Enumerate child pin nodes and find the requested one */
> + fwnode_for_each_child_node(parent_node, pin_node) {
> + u32 reg;
> +
> + if (fwnode_property_read_u32(pin_node, "reg", ®))
> + continue;
> +
> + if (reg == args.args[0])
> + break;
> + }
> +
> + /* Release pin's parent and dpll device node */
> + fwnode_handle_put(parent_node);
> + fwnode_handle_put(args.fwnode);
> +
> + return pin_node ? pin_node : ERR_PTR(-ENOENT);
> +}
> +EXPORT_SYMBOL_GPL(fwnode_dpll_pin_node_get);
> +
> static int
> __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
> const struct dpll_pin_ops *ops, void *priv, void *cookie)
> diff --git a/drivers/of/property.c b/drivers/of/property.c
> index 4e3524227720a..8571c8bb71ade 100644
> --- a/drivers/of/property.c
> +++ b/drivers/of/property.c
> @@ -1410,6 +1410,7 @@ DEFINE_SIMPLE_PROP(post_init_providers, "post-init-providers", NULL)
> DEFINE_SIMPLE_PROP(access_controllers, "access-controllers", "#access-controller-cells")
> DEFINE_SIMPLE_PROP(pses, "pses", "#pse-cells")
> DEFINE_SIMPLE_PROP(power_supplies, "power-supplies", NULL)
> +DEFINE_SIMPLE_PROP(dpll_pins, "dpll-pins", "#dpll-pin-cells")
> DEFINE_SUFFIX_PROP(regulators, "-supply", NULL)
> DEFINE_SUFFIX_PROP(gpio, "-gpio", "#gpio-cells")
>
> @@ -1568,6 +1569,7 @@ static const struct supplier_bindings of_supplier_bindings[] = {
> .parse_prop = parse_post_init_providers,
> .fwlink_flags = FWLINK_FLAG_IGNORE,
> },
> + { .parse_prop = parse_dpll_pins, },
Keep the same order as the other table please.
-Saravana
> {}
> };
>
> diff --git a/include/linux/dpll.h b/include/linux/dpll.h
> index f0c31a111c304..755c36d1ef45a 100644
> --- a/include/linux/dpll.h
> +++ b/include/linux/dpll.h
> @@ -11,6 +11,7 @@
> #include <linux/device.h>
> #include <linux/netlink.h>
> #include <linux/netdevice.h>
> +#include <linux/property.h>
> #include <linux/rtnetlink.h>
>
> struct dpll_device;
> @@ -176,6 +177,8 @@ int dpll_netdev_add_pin_handle(struct sk_buff *msg,
> const struct net_device *dev);
>
> struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode);
> +struct fwnode_handle *fwnode_dpll_pin_node_get(struct fwnode_handle *fwnode,
> + const char *name);
> #else
> static inline void
> dpll_netdev_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin) { }
> @@ -197,8 +200,20 @@ fwnode_dpll_pin_find(struct fwnode_handle *fwnode)
> {
> return NULL;
> }
> +
> +static inline struct fwnode_handle *
> +fwnode_dpll_pin_node_get(struct fwnode_handle *fwnode, const char *name)
> +{
> + return NULL;
> +}
> #endif
>
> +static inline struct fwnode_handle *
> +device_dpll_pin_node_get(struct device *dev, const char *name)
> +{
> + return fwnode_dpll_pin_node_get(dev_fwnode(dev), name);
> +}
> +
> struct dpll_device *
> dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module);
>
> --
> 2.52.0
>
Powered by blists - more mailing lists