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Message-ID: <juvvkliij2fbv2n5jgebuczlevbswgku5vtjm5m5hldbm7i74t@5ccwalmficeg>
Date: Mon, 9 Feb 2026 11:53:37 -0600
From: Andrew Jones <andrew.jones@....qualcomm.com>
To: maohan4761@...il.com
Cc: pjw@...nel.org, palmer@...belt.com, guoren@...nel.org,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Mao Han <han_mao@...ux.alibaba.com>
Subject: Re: [PATCH 1/1] riscv: Optimize user copy with efficient unaligned
 access support

On Tue, Dec 02, 2025 at 03:41:21PM +0800, maohan4761@...il.com wrote:
...
> +.L_len_less_16x_szreg:
> +        # Pre-check: ensure at least one register copy is possible

ensure at least four register copies are possible

> +        addi     t1, a0, 4*SZREG
> +        bgtu    t1, t0, .L_len_less_4x_szreg
> +
> +.L_loop_4x_reg:
> +        fixup REG_L   a4,        0(a1), 10f
> +        fixup REG_L   a5,    SZREG(a1), 10f
> +        fixup REG_L   a6,  2*SZREG(a1), 10f
> +        fixup REG_L   a7,  3*SZREG(a1), 10f
> +        fixup REG_S   a4,        0(a0), 10f
> +        fixup REG_S   a5,    SZREG(a0), 10f
> +        fixup REG_S   a6,  2*SZREG(a0), 10f
> +        fixup REG_S   a7,  3*SZREG(a0), 10f
> +        addi    a1, a1, 4*SZREG
> +        addi    a0, a0, 4*SZREG
> +
> +        # Check if another register copy is safe

Check if another four register copies are safe

> +        addi    t1, a0, 4*SZREG
> +        bleu    t1, t0, .L_loop_4x_reg
> +

Thanks,
drew

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