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Message-ID: <ews4iqb4wjvrrn4ofqizp4djo5cnzehyxgis6kki2ymf4g6xjc@irnt4rtrvikv>
Date: Mon, 9 Feb 2026 22:20:55 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Srinivas Kandagatla <srinivas.kandagatla@....qualcomm.com>
Cc: lee@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
andersson@...nel.org, konradybcio@...nel.org, sboyd@...nel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, alexey.klimov@...aro.org,
r.mereu@...uino.cc
Subject: Re: [PATCH 2/4] arm64: dts: qcom: agatti: add LPASS devices
On Mon, Feb 09, 2026 at 05:12:51PM +0000, Srinivas Kandagatla wrote:
> On 2/9/26 3:28 PM, Dmitry Baryshkov wrote:
> > On Mon, Feb 09, 2026 at 02:24:26PM +0000, Srinivas Kandagatla wrote:
> >> From: Alexey Klimov <alexey.klimov@...aro.org>
> >>
> >> The rxmacro, txmacro, vamacro, soundwire nodes, lpass clock
> >> controllers are required to support audio playback and
> >> audio capture on sm6115 and its derivatives.
> >>
> >> Signed-off-by: Alexey Klimov <alexey.klimov@...aro.org>
> >> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@....qualcomm.com>
> >> ---
> >> arch/arm64/boot/dts/qcom/agatti.dtsi | 189 +++++++++++++++++++++++++++
> >> 1 file changed, 189 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/agatti.dtsi b/arch/arm64/boot/dts/qcom/agatti.dtsi
> >> index 76b93b7bd50f..79cd8bb8e02c 100644
> >> --- a/arch/arm64/boot/dts/qcom/agatti.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/agatti.dtsi
> >> @@ -758,6 +758,42 @@ data-pins {
> >> drive-strength = <8>;
> >> };
> >> };
> >> +
> >> + lpass_tx_swr_active: lpass-tx-swr-active-state {
> >> + clk-pins {
> >> + pins = "gpio0";
> >> + function = "swr_tx_clk";
> >> + drive-strength = <10>;
> >> + slew-rate = <3>;
> >> + bias-disable;
> >> + };
> >> +
> >> + data-pins {
> >> + pins = "gpio1", "gpio2";
> >> + function = "swr_tx_data";
> >> + drive-strength = <10>;
> >> + slew-rate = <3>;
> >> + bias-bus-hold;
> >> + };
> >> + };
> >> +
> >> + lpass_rx_swr_active: lpass-rx-swr-active-state {
> >> + clk-pins {
> >> + pins = "gpio3";
> >> + function = "swr_rx_clk";
> >> + drive-strength = <10>;
> >> + slew-rate = <3>;
> >> + bias-disable;
> >> + };
> >> +
> >> + data-pins {
> >> + pins = "gpio4", "gpio5";
> >> + function = "swr_rx_data";
> >> + drive-strength = <10>;
> >> + slew-rate = <3>;
> >> + bias-bus-hold;
> >> + };
> >> + };
> >> };
> >>
> >> gcc: clock-controller@...0000 {
> >> @@ -2188,6 +2224,159 @@ glink-edge {
> >> };
> >> };
> >>
> >> + rxmacro: codec@...0000 {
> >> + compatible = "qcom,sm6115-lpass-rx-macro";
> >> + reg = <0x0 0xa600000 0x0 0x1000>;
> >> +
> >> + clocks = <&q6afecc LPASS_CLK_ID_RX_CORE_MCLK
> >> + LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> >
> > Plesae correct the indentation (or just use single line for each entry).
> Checkpatch was not happy with more than 100 chars, which is why I folded
> this out, I will fix the indent in next spin.
Well, the first thing that caught my eye was the LPASS_ being slightly
out (this one is misaligned with the rest of the the lines). So, if you
don't want to over the 100-chars limit, then please consider aligning
past the angle bracket.
--
With best wishes
Dmitry
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