linux-kernel - Re: [PATCH] ARM: dts: aspeed: santabarbara: Add swb cpld io expander

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <212de4074664dc0507b6ed174443b37cf7bf5053.camel@codeconstruct.com.au>
Date: Mon, 09 Feb 2026 16:15:51 +1030
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: Fred Chen <fredchen.openbmc@...il.com>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski
	 <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Joel Stanley
	 <joel@....id.au>, devicetree@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM: dts: aspeed: santabarbara: Add swb cpld io expander

On Thu, 2026-01-29 at 15:37 +0800, Fred Chen wrote:
> Add CPLD-simulated IO expanders
> 

If these are not genuine PCA9555 parts then I expect you should define
your own compatible string for the implementation which allows
nxp,pca9555 as a fallback. That way you can account for bugs in the
implementation either way (either in the kernel if updating the CPLD
firmware is not feasible in some situations, or by updating the
firmware when it is).

Andrew

>  for cable presence detection and 4 SPI
> flash control. To resolve sideband pin shortages, one IO expander is
> utilized to aggregate interrupt signals.
> 
> Signed-off-by: Fred Chen <fredchen.openbmc@...il.com>
> ---
>  .../aspeed-bmc-facebook-santabarbara.dts      | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
> index 0a3e2e241063..39f7fade8ff7 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
> @@ -1335,6 +1335,39 @@ eeprom@50 {
>  &i2c12 {
>  	status = "okay";
>  
> +	ioexp0: gpio@20 {
> +		compatible = "nxp,pca9555";
> +		reg = <0x20>;
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +		interrupt-parent = <&sgpiom0>;
> +		interrupts = <148 IRQ_TYPE_LEVEL_LOW>;
> +		gpio-line-names =
> +			"IOEXP_21h_INT_N","","","",
> +			"","","","",
> +			"","","","",
> +			"","","","";
> +	};
> +
> +	gpio@21 {
> +		compatible = "nxp,pca9555";
> +		reg = <0x21>;
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +		interrupt-parent = <&ioexp0>;
> +		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> +		gpio-line-names =
> +			"PDB_PRSNT_J1_N","PDB_PRSNT_J2_N",
> +			"PRSNT_NIC1_N","PRSNT_NIC2_N",
> +			"PRSNT_NIC3_N","PRSNT_NIC4_N",
> +			"SWB_PWR_FAULT_STATUS","",
> +			"CBL_PRSNT_MCIO_0_N","CBL_PRSNT_MCIO_1_N",
> +			"CBL_PRSNT_MCIO_2_N","CBL_PRSNT_MCIO_3_N",
> +			"","","","";
> +	};
> +
>  	gpio@27 {
>  		compatible = "nxp,pca9555";
>  		reg = <0x27>;
> @@ -1349,6 +1382,21 @@ gpio@27 {
>  			"SPI_MUX_SEL","","","";
>  	};
>  
> +	gpio@28 {
> +		compatible = "nxp,pca9555";
> +		reg = <0x28>;
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +		gpio-line-names =
> +			"SCO_UART_MUX_SEL0","SCO_UART_MUX_SEL1",
> +			"SPI_PROG_PL12_SEL","SPI_PROG_PL34_SEL",
> +			"","","","",
> +			"I3C_HUB_3_MUX_SEL_PLD","",
> +			"SPI_PROG_PL12_EN_N","SPI_PROG_PL34_EN_N",
> +			"SCO1_SPI_SEL","SCO2_SPI_SEL",
> +			"SCO3_SPI_SEL","SCO4_SPI_SEL";
> +	};
> +
>  	// SWB FRU
>  	eeprom@52 {
>  		compatible = "atmel,24c64";