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Message-ID: <f9b0e77c-342e-4d08-8170-660a6c87b0b4@nvidia.com>
Date: Sun, 8 Feb 2026 17:47:29 -0800
From: John Hubbard <jhubbard@...dia.com>
To: Timur Tabi <ttabi@...dia.com>, Alexandre Courbot <acourbot@...dia.com>,
"dakr@...nel.org" <dakr@...nel.org>
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Subject: Re: [PATCH v3 05/30] gpu: nova-core: use GPU Architecture to simplify
HAL selections
On 2/6/26 10:02 AM, Timur Tabi wrote:
> On Thu, 2026-02-05 at 20:20 -0800, John Hubbard wrote:
>> + // TODO: support GA100. Its boot sequence is a lot like Turing, except that it handles
>> the
>> + // FRTS steps differently (specifically, it skips FWSEC-FRTS).
>
> Where did you get this from? I haven't started looking at GA100 yet, but this is news to me.
>
From Open RM:
GA100 returns FRTS size = 0 via kgspGetFrtsSize__0x00000000, while all
other Turing/Ampere/Ada chips use kgspGetFrtsSize_TU102, which returns
1MB.
GA100's kgspPrepareForFwsecFrts is stubbed out. It returns
NV_ERR_NOT_SUPPORTED, vs. the real kgspPrepareForFwsecFrts_TU102 used by
GA102+.
The boot sequence in kernel_gsp_tu102.c guards FWSEC-FRTS with if
(kgspGetFrtsSize_HAL(...) > 0), so GA100 (returning 0) skips it
entirely.
thanks,
--
John Hubbard
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