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Message-ID: <kbcqwqzieeawdqpiatrz3i4xnxkntvb2rusrt53fknnsukjclu@bsrjxegdwxa7>
Date: Mon, 9 Feb 2026 10:56:16 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Wangao Wang <wangao.wang@....qualcomm.com>
Cc: Bryan O'Donoghue <bod@...nel.org>,
Vikash Garodia <vikash.garodia@....qualcomm.com>,
Dikshita Agarwal <dikshita.agarwal@....qualcomm.com>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, linux-media@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/5] media: iris: Add IRIS_BSE_HW_CLK handling in power
on/off sequence
On Mon, Feb 09, 2026 at 03:39:05PM +0800, Wangao Wang wrote:
> On X1P42100 the Iris block has an extra BSE clock. Wire this clock into
> the power on/off sequence.
>
> The BSE clock is used to drive the Bin Stream Engine, which is a sub-block
> of the video codec hardware responsible for bitstream-level processing. It
> is required to be enabled separately from the core clock to ensure proper
> codec operation.
Is this clock going to be used on other platforms / VPU versions too? If
not, can we keep it away from the generic code?
>
> Signed-off-by: Wangao Wang <wangao.wang@....qualcomm.com>
> ---
> drivers/media/platform/qcom/iris/iris_vpu_common.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
--
With best wishes
Dmitry
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