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Message-Id: <DGB41FHN7N8M.3MZL3YMCO9ZTV@kernel.org>
Date: Tue, 10 Feb 2026 08:40:41 +0100
From: "Michael Walle" <mwalle@...nel.org>
To: "Eliav Farber" <farbere@...zon.com>, <tudor.ambarus@...aro.org>,
<pratyush@...nel.org>, <miquel.raynal@...tlin.com>, <richard@....at>,
<vigneshr@...com>, <linux-mtd@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/4] mtd: spi-nor: winbond: Fix locking support for
w25q64jvm
On Sun Feb 8, 2026 at 7:19 AM CET, Eliav Farber wrote:
> The Winbond w25q64jvm supports block protection through the Status
> Register (SR) and provides a Top/Bottom (TB) protection bit.
>
> Enable SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB for this device to
> properly describe its locking capabilities.
>
> The device uses Status Register bit 5 as the TB bit and supports only
> three Block Protect (BP) bits. Therefore, do not set SPI_NOR_TB_SR_BIT6
> or SPI_NOR_4BIT_BP.
>
> Reference:
> https://www.winbond.com/hq/support/documentation/levelOne.jsp?__locale=en&DocNo=DA00-W25Q64JV.1
>
> Signed-off-by: Eliav Farber <farbere@...zon.com>
> ---
> drivers/mtd/spi-nor/winbond.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
> index 6d325da121b4..eaa547d36aad 100644
> --- a/drivers/mtd/spi-nor/winbond.c
> +++ b/drivers/mtd/spi-nor/winbond.c
> @@ -296,6 +296,7 @@ static const struct flash_info winbond_nor_parts[] = {
> .id = SNOR_ID(0xef, 0x70, 0x17),
> .name = "w25q64jvm",
> .size = SZ_8M,
> + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
> .no_sfdp_flags = SECT_4K,
> }, {
> .id = SNOR_ID(0xef, 0x70, 0x18),
Reviewed-by: Michael Walle <mwalle@...nel.org>
-michael
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