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Message-ID: <8b4fb83a-caeb-49fd-8e78-67664a07cbe4@oss.qualcomm.com>
Date: Wed, 11 Feb 2026 15:05:53 +0530
From: Aakarsh Jain <aakarsh.jain@....qualcomm.com>
To: Jun Miao <jun.miao@...el.com>, tglx@...utronix.de, mingo@...hat.com,
bp@...en8.de, dave.hansen@...ux.intel.com
Cc: x86@...nel.org, linux-kernel@...r.kernel.org, fan.du@...el.com,
thomas.lendacky@....com, aakarsh.jain@....qualcomm.com
Subject: Re: [PATCH] swiotlb: add a SWIOTLB_ANY flag to lift restricted low
memory for encryption
Hi Jun,
On 4/29/2025 10:23 PM, Jun Miao wrote:
> TDX guest wants to allocate a swiotlb buffer that is not restricted
> to low memory for the trusted hypervisor scheme. So that allow to pick
> a location everywhere for hypervisors with guest memory encryption in
> swiotlb_memblock_alloc() interface by adding a new flag.
>
> Signed-off-by: Jun Miao <jun.miao@...el.com>
> ---
> arch/x86/kernel/pci-dma.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
> index 6267363e0189..73b9320c4a7d 100644
> --- a/arch/x86/kernel/pci-dma.c
> +++ b/arch/x86/kernel/pci-dma.c
> @@ -61,7 +61,7 @@ static void __init pci_swiotlb_detect(void)
> */
> if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) {
> x86_swiotlb_enable = true;
> - x86_swiotlb_flags |= SWIOTLB_FORCE;
> + x86_swiotlb_flags |= SWIOTLB_ANY | SWIOTLB_FORCE;
> }
> }
> #else
Thanks for working on this patch.
We ran into the same limitation where the SWIOTLB bounce buffer cannot
be increased beyond 1GB without this change.
I reviewed the change and tested it on our setup. With this patch
applied, we are able to successfully configure and use SWIOTLB bounce
buffer size greater than 1GB, and the previous allocation failures are
resolved.
Since, I wanted to bring more visibility to this patch.
Feel free to add
Reviewed-by: Aakarsh Jain <aakarsh.jain@....qualcomm.com>
Tested-by: Aakarsh Jain <aakarsh.jain@....qualcomm.com>
Thanks,
Aakarsh
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