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Date:	Tue, 28 Nov 2006 15:43:50 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	benh@...nel.crashing.org
Cc:	eric.lemoine@...il.com, netdev@...r.kernel.org
Subject: Re: [patch sungem] improved locking

From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
Date: Wed, 29 Nov 2006 09:57:24 +1100

> 
> > This looks mostly fine.
> > 
> > I was thinking about the lockless stuff, and I wonder if there
> > is a clever way you can get it back down to one PIO on the
> > GREG_STAT register.
> > 
> > I think you'd need to have the ->poll() clear gp->status, then
> > do a smp_wb(), right before it re-enables interrupts.
> > 
> > Then in the interrupt handler, you need to find a way to safely
> > OR-in any unset bits in gp->status in a race-free manner.
> 
> Having it atomic might work at a slightly smaller cost than a lock,
> though atomics don't have strong ordering requirements so you'd still
> have to be a bit careful.

At least in theory the atomic + any necessary memory barriers
would be cheaper than the extra PIO read we need otherwise.
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