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Message-ID: <1178563277.4859.77.camel@dell>
Date: Mon, 07 May 2007 11:41:17 -0700
From: "Michael Chan" <mchan@...adcom.com>
To: "Rick Jones" <rick.jones2@...com>
cc: "David Miller" <davem@...emloft.net>, jeff@...zik.org,
"netdev" <netdev@...r.kernel.org>
Subject: Re: [PATCH 10/11][TG3]: Reduce spurious interrupts.
On Mon, 2007-05-07 at 10:44 -0700, Rick Jones wrote:
>
> Mostly I was thinking that not all PIO reads are the same "length" and so the
> effect of the PIO read will vary, perhaps considerably, with the platform,
> particularly for a very large NUMA platform.
>
Oh I see. If the PIO read is "long" on the platform, the performance
impact will be bigger. But it probably also means that it takes longer
for the write to get to the chip to de-assert the IRQ. Without the
read, it is therefore more likely to get an extra interrupt in such a
case.
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