netdev - Re: [PATCH] make atomic_t volatile on all architectures

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Message-Id: <a599bc5062d557db46496f0d7c7886b0@kernel.crashing.org>
Date:	Sun, 12 Aug 2007 07:53:58 +0200
From:	Segher Boessenkool <segher@...nel.crashing.org>
To:	schwidefsky@...ibm.com
Cc:	wjiang@...ilience.com,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	wensong@...ux-vs.org, heiko.carstens@...ibm.com,
	linux-kernel@...r.kernel.org, ak@...e.de, cfriesen@...tel.com,
	netdev@...r.kernel.org, horms@...ge.net.au,
	akpm@...ux-foundation.org, Chuck Ebbert <cebbert@...hat.com>,
	davem@...emloft.net, zlynx@....org, Chris Snook <csnook@...hat.com>
Subject: Re: [PATCH] make atomic_t volatile on all architectures

>> You'd have to use "+m".
>
> Yes, though I would use "=m" on the output list and "m" on the input
> list. The reason is that I've seen gcc fall on its face with an ICE on
> s390 due to "+m". The explanation I've got from our compiler people was
> quite esoteric, as far as I remember gcc splits "+m" to an input 
> operand
> and an output operand. Now it can happen that the compiler chooses two
> different registers to access the same memory location. "+m" requires
> that the two memory references are identical which causes the ICE if
> they are not.

The problem is very nicely described here, last paragraph:
<http://gcc.gnu.org/ml/gcc-patches/2007-07/msg01816.html>

It's not a problem anymore in (very) recent GCC, although
that of course won't help you in the kernel (yet).

> I do not know if the current compilers still do this. Has
> anyone else seen this happen ?

In recent GCC, it's actually documented:

	 The ordinary output operands must be write-only; GCC will assume that
	the values in these operands before the instruction are dead and need
	not be generated.  Extended asm supports input-output or read-write
	operands.  Use the constraint character `+' to indicate such an operand
	and list it with the output operands.  You should only use read-write
	operands when the constraints for the operand (or the operand in which
	only some of the bits are to be changed) allow a register.

Note that last line.


Segher

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