netdev - Re: [PATCH 6/24] make atomic_read() behave consistently on frv

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Message-ID: <20070815195915.GL9645@linux.vnet.ibm.com>
Date:	Wed, 15 Aug 2007 12:59:15 -0700
From:	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
To:	Segher Boessenkool <segher@...nel.crashing.org>
Cc:	heiko.carstens@...ibm.com, horms@...ge.net.au,
	linux-kernel@...r.kernel.org, rpjday@...dspring.com, ak@...e.de,
	netdev@...r.kernel.org, cfriesen@...tel.com,
	akpm@...ux-foundation.org, torvalds@...ux-foundation.org,
	Nick Piggin <nickpiggin@...oo.com.au>,
	linux-arch@...r.kernel.org, jesper.juhl@...il.com, zlynx@....org,
	schwidefsky@...ibm.com, Chris Snook <csnook@...hat.com>,
	davem@...emloft.net, wensong@...ux-vs.org, wjiang@...ilience.com,
	David Howells <dhowells@...hat.com>
Subject: Re: [PATCH 6/24] make atomic_read() behave consistently on frv

On Wed, Aug 15, 2007 at 09:46:55PM +0200, Segher Boessenkool wrote:
> >>>Well if there is only one memory location involved, then smp_rmb()
> >>>isn't
> >>>going to really do anything anyway, so it would be incorrect to use 
> >>>it.
> >>
> >>rmb() orders *any* two reads; that includes two reads from the same
> >>location.
> >
> >If the two reads are to the same location, all CPUs I am aware of
> >will maintain the ordering without need for a memory barrier.
> 
> That's true of course, although there is no real guarantee for that.

A CPU that did not provide this property ("cache coherence") would be
most emphatically reviled.  So we are pretty safe assuming that CPUs
will provide it.

						Thanx, Paul
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