netdev - Re: make bnx2.c use msleep()

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Date:	Tue, 28 Aug 2007 16:27:12 -0700
From:	"Michael Chan" <mchan@...adcom.com>
To:	"Arnaldo Carvalho de Melo" <acme@...stprotocols.net>
cc:	"Christoph Hellwig" <hch@...radead.org>,
	"David Miller" <davem@...emloft.net>, arjan@...radead.org,
	"netdev" <netdev@...r.kernel.org>
Subject: Re: make bnx2.c use msleep()

On Tue, 2007-08-28 at 19:07 -0300, Arnaldo Carvalho de Melo wrote:
> Em Tue, Aug 28, 2007 at 10:39:26PM +0100, Christoph Hellwig escreveu:
> > On Tue, Aug 28, 2007 at 02:32:50PM -0700, David Miller wrote:
> > > From: "Michael Chan" <mchan@...adcom.com>
> > > Date: Tue, 28 Aug 2007 15:21:30 -0700
> > > 
> > > > This is a special case since we are resetting the chip.  A read right
> > > > after chip reset will hang the bus especially for A0 and A1 and that's
> > > > why we need the msleep().  TG3 also has the same problem with chip
> > > > reset.  The code that comes after the msleep() will read and poll for
> > > > the reset to complete.
> > > 
> > > That's right, I forgot about this issue.
> > > 
> > > Thanks for explaining Michael.
> > 
> > The explanation should probably be added to the driver in form of
> > a comment..
> 
> I was about to say that...
> 
[BNX2]: Add write posting comment.

Add comment to explain why we cannot read back after chip reset
before delaying.

Signed-off-by: Michael Chan <mchan@...adcom.com>

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 0091860..854d80c 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3934,6 +3934,10 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
 		/* Chip reset. */
 		REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
 
+		/* Reading back any register after chip reset will hang the
+		 * bus on 5706 A0 and A1.  The msleep below provides plenty
+		 * of margin for write posting.
+		 */
 		if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
 		    (CHIP_ID(bp) == CHIP_ID_5706_A1))
 			msleep(20);


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