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Message-Id: <20071005.154330.95907448.davem@davemloft.net>
Date: Fri, 05 Oct 2007 15:43:30 -0700 (PDT)
From: David Miller <davem@...emloft.net>
To: Matheos.Worku@....COM
Cc: netdev@...eo.de, netdev@...r.kernel.org, Ariel.Hendel@....COM,
Greg.Onufer@....COM, jeff@...zik.org, Ashley.Saulsbury@....COM
Subject: Re: [PATCH]: Third (final?) release of Sun Neptune driver
From: Matheos Worku <Matheos.Worku@....COM>
Date: Fri, 05 Oct 2007 15:18:37 -0700
> >
> >> +static void niu_set_max_burst(struct niu *np, struct tx_ring_info *rp)
> >> +{
> >> + int mtu = np->dev->mtu;
> >> +
> >> + rp->max_burst = mtu + 32;
> >> + if (rp->max_burst > 4096)
> >> + rp->max_burst = 4096;
> >
> > Why 32 and 4096? (Magic values)
>
> These values were recommended by the HW designers for fair utilization
> of DRR feature among TX/RX rings.
I'll add macro defines for these, thanks for the feedback.
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