Message-ID: <470DE006.3070005@unicon-ka.de>
Date:	Thu, 11 Oct 2007 10:34:14 +0200
From:	Matthias Winkler <m.winkler@...con-ka.de>
To:	Francois Romieu <romieu@...zoreil.com>, netdev@...r.kernel.org
Subject: Re: 8168, PCI-Express, mac-version 0x3c000000, CFG_METHOD_4

Hi Francois Romieu,

I just tested out your patch for my r8168.
The card is a: r8168, PCI-Express, mac-version 0x3c000000 and the
realtek driver from the manufacutrer uses  CFG_METHOD_4 for it.
The card did NOT work with the current 2.6.23 kernel!

Your patch seems to work but  to strange behaviors still remain:

1) The dropped RX_packet count increases very very fast (see attached 
ifconfig.txt)
2) The card is reported as FIBRE by ethtool (see attached ethtool.txt)

I think (RTL_R8(PHYstatus) & TBI_Enable) should be false for this card. 
If I replace
this expression with "0" in thte code, then the card will be reported as 
Twisted Pair...
but I'am new to all this....

Also attached:
- modprobe r8168 debug=16
- dmesg
- eththool eth0
- lspci -vvx
- ifconfig eth0


greets Matthias


> Matthias Winkler <m.winkler@...con-ka.de> :
> [...]
>   
>> I try to get the brandnew 2.6.23. r8169 working for my realtek r8168.
>> I already tried the original driver, but I'm not satisfied with it.
>> The original driver want to much DMA-Memory (1024x RxBufferSize)
>> for its Ringbuffer this could fail, if I have filesystem-IO (which needs 
>> DMA)
>> and then try to load the driver. Realteks module fails loading then. I'm not
>> sure if I should just change the RingBufferSize in the Realtek driver....
>>
>> Anyway, I hoped the new kernel driver will fix this up. But my card is 
>> not regonized right from the driver.
>>
>> My mac-version is 0x3c000000 which is not in the list of the kernel 
>> driver. The realtek drivers
>> classifies my card as CFG_METHOD_4:
>>     
>
> Can you try the patch below against 2.6.23 and add netdev@...r.kernel.org
> to the Cc: when you report the result (with a bit of context for the
> newcomers please) ?
>
> I'd welcome a complete lspci -vvx + dmesg + motherboard id ?
>
> commit 4f0e9ba5317c6b1d582ec21542d57c1917c73cb4
> Author: Francois Romieu <romieu@...zoreil.com>
> Date:   Fri Aug 17 18:26:35 2007 +0200
>
>     r8169: phy init cleanup
>     
>     Consistent use of hexadecimal. No change of behavior otherwise.
>     
>     Signed-off-by: Francois Romieu <romieu@...zoreil.com>
>     Cc: Edward Hsu <edward_hsu@...ltek.com.tw>
>
> commit 8b3e38f65801d3cd3968f43b13cecafd19e04edb
> Author: Francois Romieu <romieu@...zoreil.com>
> Date:   Fri Aug 17 18:21:58 2007 +0200
>
>     r8169: phy init for the 8168
>     
>     The values have been extracted from Realtek's r8168 driver
>     version 8.002.00.
>     
>     Signed-off-by: Francois Romieu <romieu@...zoreil.com>
>     Cc: Edward Hsu <edward_hsu@...ltek.com.tw>
>
> commit 97da75a842017058d1f6d8fbde3b8bd6c95f847f
> Author: Francois Romieu <romieu@...zoreil.com>
> Date:   Fri Aug 17 17:50:46 2007 +0200
>
>     r8169: make room for more phy init changes
>     
>     The code is reworked to easily add phy-dependant init changes.
>     No change of behavior should be noticed.
>     
>     Signed-off-by: Francois Romieu <romieu@...zoreil.com>
>     Cc: Edward Hsu <edward_hsu@...ltek.com.tw>
>
> commit b8e80c09fe8d23d1815121a34d7f066a3fa7d75d
> Author: Francois Romieu <romieu@...zoreil.com>
> Date:   Fri Aug 17 15:05:21 2007 +0200
>
>     r8169: remove dead wood
>     
>     Signed-off-by: Francois Romieu <romieu@...zoreil.com>
>     Cc: Edward Hsu <edward_hsu@...ltek.com.tw>
>
> commit 2faefb1cdec589803a486ce2a9cbf2cbaffe65b7
> Author: Francois Romieu <romieu@...zoreil.com>
> Date:   Fri Aug 17 14:55:46 2007 +0200
>
>     r8169: add MAC identifiers
>     
>     The identifiers have been extracted from Realtek's drivers:
>     - version 8.002.00 of the r8168 driver
>     - version 6.002.00 of the r8169 driver
>     - version 1.002.00 of the r8101 driver
>     
>     1. RTL_GIGA_MAC_VER_17 (8168Bf) is isolated from RTL_GIGA_MAC_VER_12 (8168Be)
>        Both are still handled the same in rtl8169_set_speed_xmii and in
>        rtl_set_rx_mode to avoid changes of behavior in this patch.
>     
>     2. RTL_GIGA_MAC_VER_16 (8101Ec) is isolated from RTL_GIGA_MAC_VER_13 (8101Eb)
>        Same thing as above with relation to rtl8169_set_speed_xmii,
>        rtl_set_rx_mode and rtl_hw_start_8101.
>     
>     3. The remaining new identifiers should not hurt.
>     
>     Signed-off-by: Francois Romieu <romieu@...zoreil.com>
>     Cc: Edward Hsu <edward_hsu@...ltek.com.tw>
>
> commit ce327077698942617fe9d293736aee95ef85eb6e
> Author: Francois Romieu <romieu@...zoreil.com>
> Date:   Thu Oct 4 22:51:38 2007 +0200
>
>     r8169: MSI support
>     
>     It is currently limited to the tested 0x8136 and 0x8168. 8169sb/8110sb ought
>     to handle it as well where they support MSI.
>     
>     Signed-off-by: Francois Romieu <romieu@...zoreil.com>
>     Cc: Edward Hsu <edward_hsu@...ltek.com.tw>
>     Tester-Cc: Rolf Eike Beer <eike-kernel@...tec.de>
>
> commit e8133c1ffa363c7003b9ce328e6f0186853789fd
> Author: Francois Romieu <romieu@...zoreil.com>
> Date:   Thu Oct 4 22:36:14 2007 +0200
>
>     r8169: convert bitfield to plain enum mask
>     
>     Signed-off-by: Francois Romieu <romieu@...zoreil.com>
>
> diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
> index c76dd29..5198b3e 100644
> --- a/drivers/net/r8169.c
> +++ b/drivers/net/r8169.c
> @@ -111,19 +111,15 @@ enum mac_version {
>  	RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd
>  	RTL_GIGA_MAC_VER_06 = 0x06, // 8110SCe
>  	RTL_GIGA_MAC_VER_11 = 0x0b, // 8168Bb
> -	RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be 8168Bf
> -	RTL_GIGA_MAC_VER_13 = 0x0d, // 8101Eb 8101Ec
> -	RTL_GIGA_MAC_VER_14 = 0x0e, // 8101
> -	RTL_GIGA_MAC_VER_15 = 0x0f  // 8101
> -};
> -
> -enum phy_version {
> -	RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
> -	RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
> -	RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
> -	RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
> -	RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
> -	RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
> +	RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be
> +	RTL_GIGA_MAC_VER_13 = 0x0d, // 8101Eb
> +	RTL_GIGA_MAC_VER_14 = 0x0e, // 8101 ?
> +	RTL_GIGA_MAC_VER_15 = 0x0f, // 8101 ?
> +	RTL_GIGA_MAC_VER_16 = 0x11, // 8101Ec
> +	RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf
> +	RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP
> +	RTL_GIGA_MAC_VER_19 = 0x13, // 8168C
> +	RTL_GIGA_MAC_VER_20 = 0x14  // 8168C
>  };
>  
>  #define _R(NAME,MAC,MASK) \
> @@ -144,7 +140,12 @@ static const struct {
>  	_R("RTL8168b/8111b",	RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
>  	_R("RTL8101e",		RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
>  	_R("RTL8100e",		RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139
> -	_R("RTL8100e",		RTL_GIGA_MAC_VER_15, 0xff7e1880)  // PCI-E 8139
> +	_R("RTL8100e",		RTL_GIGA_MAC_VER_15, 0xff7e1880), // PCI-E 8139
> +	_R("RTL8168b/8111b",	RTL_GIGA_MAC_VER_17, 0xff7e1880), // PCI-E
> +	_R("RTL8101e",		RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E
> +	_R("RTL8168cp/8111cp",	RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E
> +	_R("RTL8168c/8111c",	RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E
> +	_R("RTL8168c/8111c",	RTL_GIGA_MAC_VER_20, 0xff7e1880)  // PCI-E
>  };
>  #undef _R
>  
> @@ -277,6 +278,7 @@ enum rtl_register_content {
>  	TxDMAShift = 8,	/* DMA burst value (0-7) is shift this many bits */
>  
>  	/* Config1 register p.24 */
> +	MSIEnable	= (1 << 5),	/* Enable Message Signaled Interrupt */
>  	PMEnable	= (1 << 0),	/* Power Management Enable */
>  
>  	/* Config2 register p. 25 */
> @@ -380,6 +382,11 @@ struct ring_info {
>  	u8		__pad[sizeof(void *) - sizeof(u32)];
>  };
>  
> +enum features {
> +	RTL_FEATURE_WOL	= (1 << 0),
> +	RTL_FEATURE_MSI	= (1 << 1),
> +};
> +
>  struct rtl8169_private {
>  	void __iomem *mmio_addr;	/* memory map physical address */
>  	struct pci_dev *pci_dev;	/* Index of PCI device */
> @@ -389,7 +396,6 @@ struct rtl8169_private {
>  	u32 msg_enable;
>  	int chipset;
>  	int mac_version;
> -	int phy_version;
>  	u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
>  	u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
>  	u32 dirty_rx;
> @@ -419,7 +425,7 @@ struct rtl8169_private {
>  	unsigned int (*phy_reset_pending)(void __iomem *);
>  	unsigned int (*link_ok)(void __iomem *);
>  	struct delayed_work task;
> -	unsigned wol_enabled : 1;
> +	unsigned features;
>  };
>  
>  MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@...r.kernel.org>");
> @@ -625,7 +631,10 @@ static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
>  
>  	RTL_W8(Cfg9346, Cfg9346_Lock);
>  
> -	tp->wol_enabled = (wol->wolopts) ? 1 : 0;
> +	if (wol->wolopts)
> +		tp->features |= RTL_FEATURE_WOL;
> +	else
> +		tp->features &= ~RTL_FEATURE_WOL;
>  
>  	spin_unlock_irq(&tp->lock);
>  
> @@ -706,7 +715,8 @@ static int rtl8169_set_speed_xmii(struct net_device *dev,
>  
>  		/* This tweak comes straight from Realtek's driver. */
>  		if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
> -		    (tp->mac_version == RTL_GIGA_MAC_VER_13)) {
> +		    ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
> +		     (tp->mac_version == RTL_GIGA_MAC_VER_16))) {
>  			auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
>  		}
>  	}
> @@ -714,7 +724,8 @@ static int rtl8169_set_speed_xmii(struct net_device *dev,
>  	/* The 8100e/8101e do Fast Ethernet only. */
>  	if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
>  	    (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
> -	    (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
> +	    (tp->mac_version == RTL_GIGA_MAC_VER_15) ||
> +	    (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
>  		if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) &&
>  		    netif_msg_link(tp)) {
>  			printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
> @@ -725,7 +736,8 @@ static int rtl8169_set_speed_xmii(struct net_device *dev,
>  
>  	auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
>  
> -	if (tp->mac_version == RTL_GIGA_MAC_VER_12) {
> +	if ((tp->mac_version == RTL_GIGA_MAC_VER_12) ||
> +	    (tp->mac_version == RTL_GIGA_MAC_VER_17)) {
>  		/* Vendor specific (0x1f) and reserved (0x0e) MII registers. */
>  		mdio_write(ioaddr, 0x1f, 0x0000);
>  		mdio_write(ioaddr, 0x0e, 0x0000);
> @@ -1101,26 +1113,51 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
>  	 */
>  	const struct {
>  		u32 mask;
> +		u32 val;
>  		int mac_version;
>  	} mac_info[] = {
> -		{ 0x38800000,	RTL_GIGA_MAC_VER_15 },
> -		{ 0x38000000,	RTL_GIGA_MAC_VER_12 },
> -		{ 0x34000000,	RTL_GIGA_MAC_VER_13 },
> -		{ 0x30800000,	RTL_GIGA_MAC_VER_14 },
> -		{ 0x30000000,	RTL_GIGA_MAC_VER_11 },
> -		{ 0x98000000,	RTL_GIGA_MAC_VER_06 },
> -		{ 0x18000000,	RTL_GIGA_MAC_VER_05 },
> -		{ 0x10000000,	RTL_GIGA_MAC_VER_04 },
> -		{ 0x04000000,	RTL_GIGA_MAC_VER_03 },
> -		{ 0x00800000,	RTL_GIGA_MAC_VER_02 },
> -		{ 0x00000000,	RTL_GIGA_MAC_VER_01 }	/* Catch-all */
> +		/* 8168B family. */
> +		{ 0x7c800000, 0x3c800000,	RTL_GIGA_MAC_VER_18 },
> +		{ 0x7cf00000, 0x3c000000,	RTL_GIGA_MAC_VER_19 },
> +		{ 0x7cf00000, 0x3c200000,	RTL_GIGA_MAC_VER_20 },
> +		{ 0x7c800000, 0x3c000000,	RTL_GIGA_MAC_VER_20 },
> +
> +		/* 8168B family. */
> +		{ 0x7cf00000, 0x38000000,	RTL_GIGA_MAC_VER_12 },
> +		{ 0x7cf00000, 0x38500000,	RTL_GIGA_MAC_VER_17 },
> +		{ 0x7c800000, 0x38000000,	RTL_GIGA_MAC_VER_17 },
> +		{ 0x7c800000, 0x30000000,	RTL_GIGA_MAC_VER_11 },
> +
> +		/* 8101 family. */
> +		{ 0x7cf00000, 0x34000000,	RTL_GIGA_MAC_VER_13 },
> +		{ 0x7cf00000, 0x34200000,	RTL_GIGA_MAC_VER_16 },
> +		{ 0x7c800000, 0x34000000,	RTL_GIGA_MAC_VER_16 },
> +		/* FIXME: where did these entries come from ? -- FR */
> +		{ 0xfc800000, 0x38800000,	RTL_GIGA_MAC_VER_15 },
> +		{ 0xfc800000, 0x30800000,	RTL_GIGA_MAC_VER_14 },
> +
> +		/* 8110 family. */
> +		{ 0xfc800000, 0x98000000,	RTL_GIGA_MAC_VER_06 },
> +		{ 0xfc800000, 0x18000000,	RTL_GIGA_MAC_VER_05 },
> +		{ 0xfc800000, 0x10000000,	RTL_GIGA_MAC_VER_04 },
> +		{ 0xfc800000, 0x04000000,	RTL_GIGA_MAC_VER_03 },
> +		{ 0xfc800000, 0x00800000,	RTL_GIGA_MAC_VER_02 },
> +		{ 0xfc800000, 0x00000000,	RTL_GIGA_MAC_VER_01 },
> +
> +		{ 0x00000000, 0x00000000,	RTL_GIGA_MAC_VER_01 }	/* Catch-all */
>  	}, *p = mac_info;
>  	u32 reg;
>  
> -	reg = RTL_R32(TxConfig) & 0xfc800000;
> -	while ((reg & p->mask) != p->mask)
> +	reg = RTL_R32(TxConfig);
> +	while ((reg & p->mask) != p->val)
>  		p++;
>  	tp->mac_version = p->mac_version;
> +
> +	if (p->mask == 0x00000000) {
> +		struct pci_dev *pdev = tp->pci_dev;
> +
> +		dev_info(&pdev->dev, "unknown MAC (%08x)\n", reg);
> +	}
>  }
>  
>  static void rtl8169_print_mac_version(struct rtl8169_private *tp)
> @@ -1128,54 +1165,21 @@ static void rtl8169_print_mac_version(struct rtl8169_private *tp)
>  	dprintk("mac_version = 0x%02x\n", tp->mac_version);
>  }
>  
> -static void rtl8169_get_phy_version(struct rtl8169_private *tp,
> -				    void __iomem *ioaddr)
> -{
> -	const struct {
> -		u16 mask;
> -		u16 set;
> -		int phy_version;
> -	} phy_info[] = {
> -		{ 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
> -		{ 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
> -		{ 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
> -		{ 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
> -	}, *p = phy_info;
> +struct phy_reg {
>  	u16 reg;
> +	u16 val;
> +};
>  
> -	reg = mdio_read(ioaddr, MII_PHYSID2) & 0xffff;
> -	while ((reg & p->mask) != p->set)
> -		p++;
> -	tp->phy_version = p->phy_version;
> -}
> -
> -static void rtl8169_print_phy_version(struct rtl8169_private *tp)
> +static void rtl_phy_write(void __iomem *ioaddr, struct phy_reg *regs, int len)
>  {
> -	struct {
> -		int version;
> -		char *msg;
> -		u32 reg;
> -	} phy_print[] = {
> -		{ RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
> -		{ RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
> -		{ RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
> -		{ RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
> -		{ 0, NULL, 0x0000 }
> -	}, *p;
> -
> -	for (p = phy_print; p->msg; p++) {
> -		if (tp->phy_version == p->version) {
> -			dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
> -			return;
> -		}
> +	while (len-- > 0) {
> +		mdio_write(ioaddr, regs->reg, regs->val);
> +		regs++;
>  	}
> -	dprintk("phy_version == Unknown\n");
>  }
>  
> -static void rtl8169_hw_phy_config(struct net_device *dev)
> +static void rtl8169s_hw_phy_config(void __iomem *ioaddr)
>  {
> -	struct rtl8169_private *tp = netdev_priv(dev);
> -	void __iomem *ioaddr = tp->mmio_addr;
>  	struct {
>  		u16 regs[5]; /* Beware of bit-sign propagation */
>  	} phy_magic[5] = { {
> @@ -1208,33 +1212,9 @@ static void rtl8169_hw_phy_config(struct net_device *dev)
>  	}, *p = phy_magic;
>  	unsigned int i;
>  
> -	rtl8169_print_mac_version(tp);
> -	rtl8169_print_phy_version(tp);
> -
> -	if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
> -		return;
> -	if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
> -		return;
> -
> -	dprintk("MAC version != 0 && PHY version == 0 or 1\n");
> -	dprintk("Do final_reg2.cfg\n");
> -
> -	/* Shazam ! */
> -
> -	if (tp->mac_version == RTL_GIGA_MAC_VER_04) {
> -		mdio_write(ioaddr, 31, 0x0002);
> -		mdio_write(ioaddr,  1, 0x90d0);
> -		mdio_write(ioaddr, 31, 0x0000);
> -		return;
> -	}
> -
> -	if ((tp->mac_version != RTL_GIGA_MAC_VER_02) &&
> -	    (tp->mac_version != RTL_GIGA_MAC_VER_03))
> -		return;
> -
> -	mdio_write(ioaddr, 31, 0x0001);			//w 31 2 0 1
> -	mdio_write(ioaddr, 21, 0x1000);			//w 21 15 0 1000
> -	mdio_write(ioaddr, 24, 0x65c7);			//w 24 15 0 65c7
> +	mdio_write(ioaddr, 0x1f, 0x0001);		//w 31 2 0 1
> +	mdio_write(ioaddr, 0x15, 0x1000);		//w 21 15 0 1000
> +	mdio_write(ioaddr, 0x18, 0x65c7);		//w 24 15 0 65c7
>  	rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);	//w 4 11 11 0
>  
>  	for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
> @@ -1247,7 +1227,79 @@ static void rtl8169_hw_phy_config(struct net_device *dev)
>  		rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
>  		rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
>  	}
> -	mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
> +	mdio_write(ioaddr, 0x1f, 0x0000); //w 31 2 0 0
> +}
> +
> +static void rtl8169sb_hw_phy_config(void __iomem *ioaddr)
> +{
> +	struct phy_reg phy_reg_init[] = {
> +		{ 0x1f, 0x0002 },
> +		{ 0x01, 0x90d0 },
> +		{ 0x1f, 0x0000 }
> +	};
> +
> +	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
> +}
> +
> +static void rtl8168cp_hw_phy_config(void __iomem *ioaddr)
> +{
> +	struct phy_reg phy_reg_init[] = {
> +		{ 0x1f, 0x0000 },
> +		{ 0x1d, 0x0f00 },
> +		{ 0x1f, 0x0002 },
> +		{ 0x0c, 0x1ec8 },
> +		{ 0x1f, 0x0000 }
> +	};
> +
> +	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
> +}
> +
> +static void rtl8168c_hw_phy_config(void __iomem *ioaddr)
> +{
> +	struct phy_reg phy_reg_init[] = {
> +		{ 0x1f, 0x0002 },
> +		{ 0x00, 0x88d4 },
> +		{ 0x01, 0x82b1 },
> +		{ 0x03, 0x7002 },
> +		{ 0x08, 0x9e30 },
> +		{ 0x09, 0x01f0 },
> +		{ 0x0a, 0x5500 },
> +		{ 0x0c, 0x00c8 },
> +		{ 0x1f, 0x0003 },
> +		{ 0x12, 0xc096 },
> +		{ 0x16, 0x000a },
> +		{ 0x1f, 0x0000 }
> +	};
> +
> +	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
> +}
> +
> +static void rtl_hw_phy_config(struct net_device *dev)
> +{
> +	struct rtl8169_private *tp = netdev_priv(dev);
> +	void __iomem *ioaddr = tp->mmio_addr;
> +
> +	rtl8169_print_mac_version(tp);
> +
> +	switch (tp->mac_version) {
> +	case RTL_GIGA_MAC_VER_01:
> +		break;
> +	case RTL_GIGA_MAC_VER_02:
> +	case RTL_GIGA_MAC_VER_03:
> +		rtl8169s_hw_phy_config(ioaddr);
> +		break;
> +	case RTL_GIGA_MAC_VER_04:
> +		rtl8169sb_hw_phy_config(ioaddr);
> +		break;
> +	case RTL_GIGA_MAC_VER_18:
> +		rtl8168cp_hw_phy_config(ioaddr);
> +		break;
> +	case RTL_GIGA_MAC_VER_19:
> +		rtl8168c_hw_phy_config(ioaddr);
> +		break;
> +	default:
> +		break;
> +	}
>  }
>  
>  static void rtl8169_phy_timer(unsigned long __opaque)
> @@ -1259,7 +1311,6 @@ static void rtl8169_phy_timer(unsigned long __opaque)
>  	unsigned long timeout = RTL8169_PHY_TIMEOUT;
>  
>  	assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
> -	assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
>  
>  	if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
>  		return;
> @@ -1294,8 +1345,7 @@ static inline void rtl8169_delete_timer(struct net_device *dev)
>  	struct rtl8169_private *tp = netdev_priv(dev);
>  	struct timer_list *timer = &tp->timer;
>  
> -	if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
> -	    (tp->phy_version >= RTL_GIGA_PHY_VER_H))
> +	if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
>  		return;
>  
>  	del_timer_sync(timer);
> @@ -1306,8 +1356,7 @@ static inline void rtl8169_request_timer(struct net_device *dev)
>  	struct rtl8169_private *tp = netdev_priv(dev);
>  	struct timer_list *timer = &tp->timer;
>  
> -	if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
> -	    (tp->phy_version >= RTL_GIGA_PHY_VER_H))
> +	if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
>  		return;
>  
>  	mod_timer(timer, jiffies + RTL8169_PHY_TIMEOUT);
> @@ -1359,7 +1408,7 @@ static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
>  {
>  	void __iomem *ioaddr = tp->mmio_addr;
>  
> -	rtl8169_hw_phy_config(dev);
> +	rtl_hw_phy_config(dev);
>  
>  	dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
>  	RTL_W8(0x82, 0x01);
> @@ -1454,6 +1503,7 @@ static const struct rtl_cfg_info {
>  	unsigned int align;
>  	u16 intr_event;
>  	u16 napi_event;
> +	unsigned msi;
>  } rtl_cfg_infos [] = {
>  	[RTL_CFG_0] = {
>  		.hw_start	= rtl_hw_start_8169,
> @@ -1461,7 +1511,8 @@ static const struct rtl_cfg_info {
>  		.align		= 0,
>  		.intr_event	= SYSErr | LinkChg | RxOverflow |
>  				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
> -		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow
> +		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
> +		.msi		= 0
>  	},
>  	[RTL_CFG_1] = {
>  		.hw_start	= rtl_hw_start_8168,
> @@ -1469,7 +1520,8 @@ static const struct rtl_cfg_info {
>  		.align		= 8,
>  		.intr_event	= SYSErr | LinkChg | RxOverflow |
>  				  TxErr | TxOK | RxOK | RxErr,
> -		.napi_event	= TxErr | TxOK | RxOK | RxOverflow
> +		.napi_event	= TxErr | TxOK | RxOK | RxOverflow,
> +		.msi		= RTL_FEATURE_MSI
>  	},
>  	[RTL_CFG_2] = {
>  		.hw_start	= rtl_hw_start_8101,
> @@ -1477,10 +1529,39 @@ static const struct rtl_cfg_info {
>  		.align		= 8,
>  		.intr_event	= SYSErr | LinkChg | RxOverflow | PCSTimeout |
>  				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
> -		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow
> +		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
> +		.msi		= RTL_FEATURE_MSI
>  	}
>  };
>  
> +/* Cfg9346_Unlock assumed. */
> +static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr,
> +			    const struct rtl_cfg_info *cfg)
> +{
> +	unsigned msi = 0;
> +	u8 cfg2;
> +
> +	cfg2 = RTL_R8(Config2) & ~MSIEnable;
> +	if (cfg->msi) {
> +		if (pci_enable_msi(pdev)) {
> +			dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
> +		} else {
> +			cfg2 |= MSIEnable;
> +			msi = RTL_FEATURE_MSI;
> +		}
> +	}
> +	RTL_W8(Config2, cfg2);
> +	return msi;
> +}
> +
> +static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp)
> +{
> +	if (tp->features & RTL_FEATURE_MSI) {
> +		pci_disable_msi(pdev);
> +		tp->features &= ~RTL_FEATURE_MSI;
> +	}
> +}
> +
>  static int __devinit
>  rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
>  {
> @@ -1594,10 +1675,8 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
>  
>  	/* Identify chip attached to board */
>  	rtl8169_get_mac_version(tp, ioaddr);
> -	rtl8169_get_phy_version(tp, ioaddr);
>  
>  	rtl8169_print_mac_version(tp);
> -	rtl8169_print_phy_version(tp);
>  
>  	for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
>  		if (tp->mac_version == rtl_chip_info[i].mac_version)
> @@ -1617,6 +1696,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
>  	RTL_W8(Cfg9346, Cfg9346_Unlock);
>  	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
>  	RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
> +	tp->features |= rtl_try_msi(pdev, ioaddr, cfg);
>  	RTL_W8(Cfg9346, Cfg9346_Lock);
>  
>  	if (RTL_R8(PHYstatus) & TBI_Enable) {
> @@ -1685,7 +1765,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
>  
>  	rc = register_netdev(dev);
>  	if (rc < 0)
> -		goto err_out_unmap_5;
> +		goto err_out_msi_5;
>  
>  	pci_set_drvdata(pdev, dev);
>  
> @@ -1708,7 +1788,8 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
>  out:
>  	return rc;
>  
> -err_out_unmap_5:
> +err_out_msi_5:
> +	rtl_disable_msi(pdev, tp);
>  	iounmap(ioaddr);
>  err_out_free_res_4:
>  	pci_release_regions(pdev);
> @@ -1729,6 +1810,7 @@ static void __devexit rtl8169_remove_one(struct pci_dev *pdev)
>  	flush_scheduled_work();
>  
>  	unregister_netdev(dev);
> +	rtl_disable_msi(pdev, tp);
>  	rtl8169_release_board(pdev, dev, tp->mmio_addr);
>  	pci_set_drvdata(pdev, NULL);
>  }
> @@ -1772,7 +1854,8 @@ static int rtl8169_open(struct net_device *dev)
>  
>  	smp_mb();
>  
> -	retval = request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED,
> +	retval = request_irq(dev->irq, rtl8169_interrupt,
> +			     (tp->features & RTL_FEATURE_MSI) ? 0 : IRQF_SHARED,
>  			     dev->name, dev);
>  	if (retval < 0)
>  		goto err_release_ring_2;
> @@ -2024,7 +2107,8 @@ static void rtl_hw_start_8101(struct net_device *dev)
>  	void __iomem *ioaddr = tp->mmio_addr;
>  	struct pci_dev *pdev = tp->pci_dev;
>  
> -	if (tp->mac_version == RTL_GIGA_MAC_VER_13) {
> +	if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
> +	    (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
>  		pci_write_config_word(pdev, 0x68, 0x00);
>  		pci_write_config_word(pdev, 0x69, 0x08);
>  	}
> @@ -2977,7 +3061,9 @@ static void rtl_set_rx_mode(struct net_device *dev)
>  	    (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
>  	    (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
>  	    (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
> -	    (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
> +	    (tp->mac_version == RTL_GIGA_MAC_VER_15) ||
> +	    (tp->mac_version == RTL_GIGA_MAC_VER_16) ||
> +	    (tp->mac_version == RTL_GIGA_MAC_VER_17)) {
>  		mc_filter[0] = 0xffffffff;
>  		mc_filter[1] = 0xffffffff;
>  	}
> @@ -3037,7 +3123,8 @@ static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
>  
>  out_pci_suspend:
>  	pci_save_state(pdev);
> -	pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
> +	pci_enable_wake(pdev, pci_choose_state(pdev, state),
> +		(tp->features & RTL_FEATURE_WOL) ? 1 : 0);
>  	pci_set_power_state(pdev, pci_choose_state(pdev, state));
>  
>  	return 0;
>   


View attachment "r8168.modprobe_debug.txt" of type "text/plain" (434 bytes)

View attachment "r8168.dmesg.txt" of type "text/plain" (15421 bytes)

View attachment "r8168.ethtool.txt" of type "text/plain" (388 bytes)

View attachment "r8168.ifconfig.txt" of type "text/plain" (486 bytes)

View attachment "r8168.lspci.txt" of type "text/plain" (19838 bytes)

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