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Date:	Mon, 12 Nov 2007 21:21:35 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	mcarlson@...adcom.com
Cc:	netdev@...r.kernel.org, andy@...yhouse.net, mchan@...adcom.com
Subject: Re: [PATCH 10/13] tg3: Increase the PCI MRRS

From: "Matt Carlson" <mcarlson@...adcom.com>
Date: Fri, 09 Nov 2007 16:39:01 -0800

> Previous devices hardcoded the PCI Maximum Read Request Size to 4K.  To
> better comply with the PCI spec, the hardware now defaults the MRRS to
> 512 bytes.  This will yield poor driver performance if left untouched.
> This patch increases the MRRS to 4K on driver initialization.
> 
> Signed-off-by: Matt Carlson <mcarlson@...adcom.com>
> Signed-off-by: Michael Chan <mchan@...adcom.com>

I've applied this patch, but...

I sense that the PCI spec wants devices to use an MRRS value of 512 in
order to get better fairness on a PCI-E segment amongst multiple
devices.

>From that perspective, jacking up the MRRS to 4096 unilaterally seems
like a very bad idea.  If this was necessary for good performance, I'm
sure the PCI spec folks would have choosen a higher value.

Or is this some tg3 specific performance issue?
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