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Message-ID: <36D9DB17C6DE9E40B059440DB8D95F5203FF45C4@orsmsx418.amr.corp.intel.com>
Date: Thu, 13 Dec 2007 16:51:22 -0800
From: "Brandeburg, Jesse" <jesse.brandeburg@...el.com>
To: "Andrew Morton" <akpm@...ux-foundation.org>,
"Ayaz Abdulla" <AAbdulla@...dia.com>
Cc: <jeff@...zik.org>, <netdev@...r.kernel.org>, <eswierk@...stra.com>
Subject: RE: [patch 02/10] forcedeth: power down phy when interface is down
Andrew Morton wrote:
> On Thu, 13 Dec 2007 16:11:55 -0800
> "Ayaz Abdulla" <AAbdulla@...dia.com> wrote:
>
>> I would not include this patch until further testing is performed.
>> NVIDIA MCP chips use 3rd party PHY vendors. By powering down the
>> phy, it could have adverse affects on certain phys.
>>
>> Ayaz
>>
>>
>> -----Original Message-----
>> From: akpm@...ux-foundation.org [mailto:akpm@...ux-foundation.org]
>> Sent: Thursday, December 13, 2007 4:03 PM
>> To: jeff@...zik.org
>> Cc: netdev@...r.kernel.org; akpm@...ux-foundation.org;
>> eswierk@...stra.com; Ayaz Abdulla
>> Subject: [patch 02/10] forcedeth: power down phy when interface is
>> down
>>
>>
>> From: "Ed Swierk" <eswierk@...stra.com>
>>
>> Bring the physical link down when the interface is down by placing
>> the PHY in power-down state, unless WOL is enabled. This mirrors
>> the behavior of other drivers including e1000 and tg3.
>
> Does this patch actually fix any observeable problem?
as a side note this one feature has caused more bugs than almost any
feature I can think of in e1000. If Linux had a decent power manager
that handled PCI device D-states (D0/D3) then most hardware that is able
to be certified in M$ OSes would already implement power savings just by
going to D3 when it was not being used. In e1000's case all the "power
down phy" logic would become useless because the hardware already has a
huge dependency tree that it walks when going to D3 to decide if it can
power down the link, or go to a lower power link (like 100Mb or 10Mb)
/rant
Jesse
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