netdev - Re: [PATCH UCC TDM 3/3 ] Modified Documentation to explain dts entries for TDM driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20080124201226.GA3926@loki.buserror.net>
Date:	Thu, 24 Jan 2008 14:12:26 -0600
From:	Scott Wood <scottwood@...escale.com>
To:	Poonam_Aggrwal-b10812 <b10812@...escale.com>
Cc:	kumar.gala@...escale.com, akpm@...ux-foundation.org,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
	rubini@...ion.unipv.it, linuxppc-dev@...abs.org,
	michael.barkowski@...escale.com, rich.cutler@...escale.com,
	timur@...escale.com, ashish.kalra@...escale.com
Subject: Re: [PATCH UCC TDM 3/3 ] Modified Documentation to explain dts
	entries for TDM driver

On Thu, Jan 24, 2008 at 10:24:13AM +0530, Poonam_Aggrwal-b10812 wrote:
> +  ix) Baud Rate Generator (BRG)
> +
> +  Required properties:
> +  - compatible : shpuld be "fsl,cpm-brg"
> +  - fsl,brg-sources : define the input clock for all 16 BRGs. The input
> +    clock source could be 1 to 24 for CLK1 to CLK24. Zero means that the
> +    particular BRG will be driven by QE clock(BRGCLK).

Should also have a clock-frequency property to specify what BRGCLK is.

-Scott
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html