/*
 * Marvell DSA (Distributed Switch Architecture) Ethertype handling.
 *
 * Copyright (C) Jesper Dangaard Brouer, Visipia Aps.
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License as published by
 *	the Free Software Foundation; either version 2 of the License, or
 *	(at your option) any later version.
 *
 *	This program is distributed in the hope that it will be useful,
 *	but WITHOUT ANY WARRANTY; without even the implied warranty of
 *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *	GNU General Public License for more details.
 *
 *	You should have received a copy of the GNU General Public License
 *	along with this program; if not, write to the Free Software
 *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 * SVN version info:
 * 	$LastChangedDate: 2008-02-11 11:11:28 +0100 (Mon, 11 Feb 2008) $
 * 	$LastChangedRevision: 5238 $
 * 	$LastChangedBy: jdb $
 *
 */


#ifndef _ethertype_dsa_H_
#define _ethertype_dsa_H_

#include <linux/types.h>
#include <asm/byteorder.h>

struct dsa_header {
	__u8  type:2,
	      tagged:1,
	      dev:5;
	__u8  port:5,
	      info:3; // Decoding dependent on type
#if defined(__BIG_ENDIAN_BITFIELD)
	__u16 pri:3,
	      res:1,
	      vid:12;
#elif defined(__LITTLE_ENDIAN_BITFIELD)
#error	"Not defined for Little Endian CPUs"
#else
#error	"Adjust your <asm/byteorder.h> defines"
#endif
};

// DSA Tag Types
enum {
	DSA_TO_CPU     = 0x0, // b00
	DSA_FROM_CPU   = 0x1, // b01
	DSA_TO_SNIFFER = 0x2, // b10
	DSA_FORWARD    = 0x3, // b11
};

// DSA_TO_CPU Support codes
enum {
        BDPU_TRAP          = 0x0, // b000
	FRAME2REG_RESPONSE = 0x1, // b001
	IGMP_TRAP          = 0x2, // b010
	POLICY_TRAP        = 0x3, // b011
	ARP_MIRROR         = 0x4, // b100
	POLICY_MIRROR      = 0x5, // b101
};


extern void dsa_register_handler  (void);
extern void dsa_unregister_handler(void);

#endif