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Date: Sat, 16 Feb 2008 18:44:56 -0800
From: "Subbu Seetharaman" <subbus@...verengines.com>
To: netdev@...r.kernel.org
Subject: [PATHCH 11/16] ServerEngines 10Gb NIC driver
F/W header files.
------------------
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/mpu_context.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/mpu_context.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/mpu_context.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/mpu_context.h 2008-02-14 15:23:07.821203760 +0530
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __mpu_context_amap_h__
+#define __mpu_context_amap_h__
+#include "setypes.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __mpu_context_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_eth.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_eth.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_eth.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_eth.h 2008-02-14 15:23:07.822203608 +0530
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __ioctl_eth_amap_h__
+#define __ioctl_eth_amap_h__
+#include "setypes.h"
+#include "ioctl_hdr.h"
+#include "ioctl_types.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+
+/* --- RXF_STATS_INTERESTING_OFFSETS --- */
+#define P0_RECVD_TOTAL_BYTES_LSD_DWORD_OFFSET (0)
+#define P0_RECVD_TOTAL_BYTES_MSD_DWORD_OFFSET (1)
+#define P0_XMIT_BYTES_LSD_DWORD_OFFSET (40)
+#define P0_XMIT_BYTES_MSD_DWORD_OFFSET (41)
+#define P1_RECVD_TOTAL_BYTES_LSD_DWORD_OFFSET (59)
+#define P1_RECVD_TOTAL_BYTES_MSD_DWORD_OFFSET (60)
+#define P1_XMIT_BYTES_LSD_DWORD_OFFSET (99)
+#define P1_XMIT_BYTES_MSD_DWORD_OFFSET (100)
+
+/*
+ * --- ENABLE_RSS_ENUM ---
+ * Enable RSS enum.
+ */
+#define RSS_ENABLE_NONE (0) /* No RSS */
+#define RSS_ENABLE_IPV4 (1) /* IPV4 HASH only (i.e. only IP */
+ /* source/dest two-tuple) */
+#define RSS_ENABLE_TCP_IPV4 (2) /* TCP IPV4 HASH only
+ (i.e. only TCP/IP four-tuple) */
+#define RSS_ENABLE_IPV4_OR_TCP_IPV4 (3) /* IPV4 or TCP IPV4 HASH (i.e. if */
+ /*
+ * TCP/IP, then use four-tuple, else if
+ * IP use two-tuple)
+ */
+
+/*
+ * --- RSS_FLUSH_CQ_ENUM ---
+ * Flush CQ enum.
+ */
+#define RSS_FLUSH_CQ_DEFAULT (1) /* Flush default host networking CQ */
+#define RSS_FLUSH_CQ_PROC0 (2) /* Flush RSS CQ for processor 0 */
+#define RSS_FLUSH_CQ_PROC1 (4) /* Flush RSS CQ for processor 1 */
+#define RSS_FLUSH_CQ_PROC2 (8) /* Flush RSS CQ for processor 2 */
+#define RSS_FLUSH_CQ_PROC3 (16) /* Flush RSS CQ for processor 3 */
+
+
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __ioctl_eth_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/etx_context.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/etx_context.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/etx_context.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/etx_context.h 2008-02-14 15:23:07.822203608 +0530
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __etx_context_amap_h__
+#define __etx_context_amap_h__
+#include "setypes.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+/* ETX ring context structure. */
+typedef struct {
+ BE_BIT tx_cidx[11]; /* DWORD 0 */
+ BE_BIT rsvd0[5]; /* DWORD 0 */
+ BE_BIT rsvd1[16]; /* DWORD 0 */
+ BE_BIT tx_pidx[11]; /* DWORD 1 */
+ BE_BIT rsvd2; /* DWORD 1 */
+ BE_BIT tx_ring_size[4]; /* DWORD 1 */
+ BE_BIT pd_id[5]; /* DWORD 1 */
+ BE_BIT pd_id_not_valid; /* DWORD 1 */
+ BE_BIT cq_id_send[10]; /* DWORD 1 */
+ BE_BIT rsvd3[32]; /* DWORD 2 */
+ BE_BIT rsvd4[32]; /* DWORD 3 */
+ BE_BIT cur_bytes[32]; /* DWORD 4 */
+ BE_BIT max_bytes[32]; /* DWORD 5 */
+ BE_BIT time_stamp[32]; /* DWORD 6 */
+ BE_BIT rsvd5[11]; /* DWORD 7 */
+ BE_BIT func; /* DWORD 7 */
+ BE_BIT rsvd6[20]; /* DWORD 7 */
+ BE_BIT cur_txd_count[32]; /* DWORD 8 */
+ BE_BIT max_txd_count[32]; /* DWORD 9 */
+ BE_BIT rsvd7[32]; /* DWORD 10 */
+ BE_BIT rsvd8[32]; /* DWORD 11 */
+ BE_BIT rsvd9[32]; /* DWORD 12 */
+ BE_BIT rsvd10[32]; /* DWORD 13 */
+ BE_BIT rsvd11[32]; /* DWORD 14 */
+ BE_BIT rsvd12[32]; /* DWORD 15 */
+} SG_PACK BE_ETX_CONTEXT_AMAP;
+typedef struct {
+ u32 dw[16];
+} ETX_CONTEXT_AMAP, *PETX_CONTEXT_AMAP;
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __etx_context_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/cev.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/cev.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/cev.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/cev.h 2008-02-14 15:23:07.823203456 +0530
@@ -0,0 +1,275 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __cev_amap_h__
+#define __cev_amap_h__
+#include "setypes.h"
+#include "ep.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+/*
+ * Host Interrupt Status Register 0. The first of four application
+ * interrupt status registers. This register contains the interrupts
+ * for Event Queues EQ0 through EQ31.
+ */
+typedef struct {
+ BE_BIT interrupt0; /* DWORD 0 */
+ BE_BIT interrupt1; /* DWORD 0 */
+ BE_BIT interrupt2; /* DWORD 0 */
+ BE_BIT interrupt3; /* DWORD 0 */
+ BE_BIT interrupt4; /* DWORD 0 */
+ BE_BIT interrupt5; /* DWORD 0 */
+ BE_BIT interrupt6; /* DWORD 0 */
+ BE_BIT interrupt7; /* DWORD 0 */
+ BE_BIT interrupt8; /* DWORD 0 */
+ BE_BIT interrupt9; /* DWORD 0 */
+ BE_BIT interrupt10; /* DWORD 0 */
+ BE_BIT interrupt11; /* DWORD 0 */
+ BE_BIT interrupt12; /* DWORD 0 */
+ BE_BIT interrupt13; /* DWORD 0 */
+ BE_BIT interrupt14; /* DWORD 0 */
+ BE_BIT interrupt15; /* DWORD 0 */
+ BE_BIT interrupt16; /* DWORD 0 */
+ BE_BIT interrupt17; /* DWORD 0 */
+ BE_BIT interrupt18; /* DWORD 0 */
+ BE_BIT interrupt19; /* DWORD 0 */
+ BE_BIT interrupt20; /* DWORD 0 */
+ BE_BIT interrupt21; /* DWORD 0 */
+ BE_BIT interrupt22; /* DWORD 0 */
+ BE_BIT interrupt23; /* DWORD 0 */
+ BE_BIT interrupt24; /* DWORD 0 */
+ BE_BIT interrupt25; /* DWORD 0 */
+ BE_BIT interrupt26; /* DWORD 0 */
+ BE_BIT interrupt27; /* DWORD 0 */
+ BE_BIT interrupt28; /* DWORD 0 */
+ BE_BIT interrupt29; /* DWORD 0 */
+ BE_BIT interrupt30; /* DWORD 0 */
+ BE_BIT interrupt31; /* DWORD 0 */
+} SG_PACK BE_CEV_ISR0_CSR_AMAP;
+typedef struct {
+ u32 dw[1];
+} CEV_ISR0_CSR_AMAP, *PCEV_ISR0_CSR_AMAP;
+
+/*
+ * Host Interrupt Status Register 1. The second of four application
+ * interrupt status registers. This register contains the interrupts
+ * for Event Queues EQ32 through EQ63.
+ */
+typedef struct {
+ BE_BIT interrupt32; /* DWORD 0 */
+ BE_BIT interrupt33; /* DWORD 0 */
+ BE_BIT interrupt34; /* DWORD 0 */
+ BE_BIT interrupt35; /* DWORD 0 */
+ BE_BIT interrupt36; /* DWORD 0 */
+ BE_BIT interrupt37; /* DWORD 0 */
+ BE_BIT interrupt38; /* DWORD 0 */
+ BE_BIT interrupt39; /* DWORD 0 */
+ BE_BIT interrupt40; /* DWORD 0 */
+ BE_BIT interrupt41; /* DWORD 0 */
+ BE_BIT interrupt42; /* DWORD 0 */
+ BE_BIT interrupt43; /* DWORD 0 */
+ BE_BIT interrupt44; /* DWORD 0 */
+ BE_BIT interrupt45; /* DWORD 0 */
+ BE_BIT interrupt46; /* DWORD 0 */
+ BE_BIT interrupt47; /* DWORD 0 */
+ BE_BIT interrupt48; /* DWORD 0 */
+ BE_BIT interrupt49; /* DWORD 0 */
+ BE_BIT interrupt50; /* DWORD 0 */
+ BE_BIT interrupt51; /* DWORD 0 */
+ BE_BIT interrupt52; /* DWORD 0 */
+ BE_BIT interrupt53; /* DWORD 0 */
+ BE_BIT interrupt54; /* DWORD 0 */
+ BE_BIT interrupt55; /* DWORD 0 */
+ BE_BIT interrupt56; /* DWORD 0 */
+ BE_BIT interrupt57; /* DWORD 0 */
+ BE_BIT interrupt58; /* DWORD 0 */
+ BE_BIT interrupt59; /* DWORD 0 */
+ BE_BIT interrupt60; /* DWORD 0 */
+ BE_BIT interrupt61; /* DWORD 0 */
+ BE_BIT interrupt62; /* DWORD 0 */
+ BE_BIT interrupt63; /* DWORD 0 */
+} SG_PACK BE_CEV_ISR1_CSR_AMAP;
+typedef struct {
+ u32 dw[1];
+} CEV_ISR1_CSR_AMAP, *PCEV_ISR1_CSR_AMAP;
+/*
+ * Host Interrupt Status Register 2. The third of four application
+ * interrupt status registers. This register contains the interrupts
+ * for Event Queues EQ64 through EQ95.
+ */
+typedef struct {
+ BE_BIT interrupt64; /* DWORD 0 */
+ BE_BIT interrupt65; /* DWORD 0 */
+ BE_BIT interrupt66; /* DWORD 0 */
+ BE_BIT interrupt67; /* DWORD 0 */
+ BE_BIT interrupt68; /* DWORD 0 */
+ BE_BIT interrupt69; /* DWORD 0 */
+ BE_BIT interrupt70; /* DWORD 0 */
+ BE_BIT interrupt71; /* DWORD 0 */
+ BE_BIT interrupt72; /* DWORD 0 */
+ BE_BIT interrupt73; /* DWORD 0 */
+ BE_BIT interrupt74; /* DWORD 0 */
+ BE_BIT interrupt75; /* DWORD 0 */
+ BE_BIT interrupt76; /* DWORD 0 */
+ BE_BIT interrupt77; /* DWORD 0 */
+ BE_BIT interrupt78; /* DWORD 0 */
+ BE_BIT interrupt79; /* DWORD 0 */
+ BE_BIT interrupt80; /* DWORD 0 */
+ BE_BIT interrupt81; /* DWORD 0 */
+ BE_BIT interrupt82; /* DWORD 0 */
+ BE_BIT interrupt83; /* DWORD 0 */
+ BE_BIT interrupt84; /* DWORD 0 */
+ BE_BIT interrupt85; /* DWORD 0 */
+ BE_BIT interrupt86; /* DWORD 0 */
+ BE_BIT interrupt87; /* DWORD 0 */
+ BE_BIT interrupt88; /* DWORD 0 */
+ BE_BIT interrupt89; /* DWORD 0 */
+ BE_BIT interrupt90; /* DWORD 0 */
+ BE_BIT interrupt91; /* DWORD 0 */
+ BE_BIT interrupt92; /* DWORD 0 */
+ BE_BIT interrupt93; /* DWORD 0 */
+ BE_BIT interrupt94; /* DWORD 0 */
+ BE_BIT interrupt95; /* DWORD 0 */
+} SG_PACK BE_CEV_ISR2_CSR_AMAP;
+typedef struct {
+ u32 dw[1];
+} CEV_ISR2_CSR_AMAP, *PCEV_ISR2_CSR_AMAP;
+
+/*
+ * Host Interrupt Status Register 3. The fourth of four application
+ * interrupt status registers. This register contains the interrupts
+ * for Event Queues EQ96 through EQ127.
+ */
+typedef struct {
+ BE_BIT interrupt96; /* DWORD 0 */
+ BE_BIT interrupt97; /* DWORD 0 */
+ BE_BIT interrupt98; /* DWORD 0 */
+ BE_BIT interrupt99; /* DWORD 0 */
+ BE_BIT interrupt100; /* DWORD 0 */
+ BE_BIT interrupt101; /* DWORD 0 */
+ BE_BIT interrupt102; /* DWORD 0 */
+ BE_BIT interrupt103; /* DWORD 0 */
+ BE_BIT interrupt104; /* DWORD 0 */
+ BE_BIT interrupt105; /* DWORD 0 */
+ BE_BIT interrupt106; /* DWORD 0 */
+ BE_BIT interrupt107; /* DWORD 0 */
+ BE_BIT interrupt108; /* DWORD 0 */
+ BE_BIT interrupt109; /* DWORD 0 */
+ BE_BIT interrupt110; /* DWORD 0 */
+ BE_BIT interrupt111; /* DWORD 0 */
+ BE_BIT interrupt112; /* DWORD 0 */
+ BE_BIT interrupt113; /* DWORD 0 */
+ BE_BIT interrupt114; /* DWORD 0 */
+ BE_BIT interrupt115; /* DWORD 0 */
+ BE_BIT interrupt116; /* DWORD 0 */
+ BE_BIT interrupt117; /* DWORD 0 */
+ BE_BIT interrupt118; /* DWORD 0 */
+ BE_BIT interrupt119; /* DWORD 0 */
+ BE_BIT interrupt120; /* DWORD 0 */
+ BE_BIT interrupt121; /* DWORD 0 */
+ BE_BIT interrupt122; /* DWORD 0 */
+ BE_BIT interrupt123; /* DWORD 0 */
+ BE_BIT interrupt124; /* DWORD 0 */
+ BE_BIT interrupt125; /* DWORD 0 */
+ BE_BIT interrupt126; /* DWORD 0 */
+ BE_BIT interrupt127; /* DWORD 0 */
+} SG_PACK BE_CEV_ISR3_CSR_AMAP;
+typedef struct {
+ u32 dw[1];
+} CEV_ISR3_CSR_AMAP, *PCEV_ISR3_CSR_AMAP;
+
+/* Completions and Events block Registers. */
+typedef struct {
+ BE_BIT rsvd0[32]; /* DWORD 0 */
+ BE_BIT rsvd1[32]; /* DWORD 1 */
+ BE_BIT rsvd2[32]; /* DWORD 2 */
+ BE_BIT rsvd3[32]; /* DWORD 3 */
+ BE_CEV_ISR0_CSR_AMAP isr0;
+ BE_CEV_ISR1_CSR_AMAP isr1;
+ BE_CEV_ISR2_CSR_AMAP isr2;
+ BE_CEV_ISR3_CSR_AMAP isr3;
+ BE_BIT rsvd4[32]; /* DWORD 8 */
+ BE_BIT rsvd5[32]; /* DWORD 9 */
+ BE_BIT rsvd6[32]; /* DWORD 10 */
+ BE_BIT rsvd7[32]; /* DWORD 11 */
+ BE_BIT rsvd8[32]; /* DWORD 12 */
+ BE_BIT rsvd9[32]; /* DWORD 13 */
+ BE_BIT rsvd10[32]; /* DWORD 14 */
+ BE_BIT rsvd11[32]; /* DWORD 15 */
+ BE_BIT rsvd12[32]; /* DWORD 16 */
+ BE_BIT rsvd13[32]; /* DWORD 17 */
+ BE_BIT rsvd14[32]; /* DWORD 18 */
+ BE_BIT rsvd15[32]; /* DWORD 19 */
+ BE_BIT rsvd16[32]; /* DWORD 20 */
+ BE_BIT rsvd17[32]; /* DWORD 21 */
+ BE_BIT rsvd18[32]; /* DWORD 22 */
+ BE_BIT rsvd19[32]; /* DWORD 23 */
+ BE_BIT rsvd20[32]; /* DWORD 24 */
+ BE_BIT rsvd21[32]; /* DWORD 25 */
+ BE_BIT rsvd22[32]; /* DWORD 26 */
+ BE_BIT rsvd23[32]; /* DWORD 27 */
+ BE_BIT rsvd24[32]; /* DWORD 28 */
+ BE_BIT rsvd25[32]; /* DWORD 29 */
+ BE_BIT rsvd26[32]; /* DWORD 30 */
+ BE_BIT rsvd27[32]; /* DWORD 31 */
+ BE_BIT rsvd28[32]; /* DWORD 32 */
+ BE_BIT rsvd29[32]; /* DWORD 33 */
+ BE_BIT rsvd30[192]; /* DWORD 34 */
+ BE_BIT rsvd31[192]; /* DWORD 40 */
+ BE_BIT rsvd32[160]; /* DWORD 46 */
+ BE_BIT rsvd33[160]; /* DWORD 51 */
+ BE_BIT rsvd34[160]; /* DWORD 56 */
+ BE_BIT rsvd35[96]; /* DWORD 61 */
+ BE_BIT rsvd36[192][32]; /* DWORD 64 */
+} SG_PACK BE_CEV_CSRMAP_AMAP;
+typedef struct {
+ u32 dw[256];
+} CEV_CSRMAP_AMAP, *PCEV_CSRMAP_AMAP;
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __cev_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/asyncmesg.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/asyncmesg.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/asyncmesg.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/asyncmesg.h 2008-02-14 15:23:07.824203304 +0530
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __asyncmesg_amap_h__
+#define __asyncmesg_amap_h__
+#include "setypes.h"
+#include "ioctl_common.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+/* --- ASYNC_EVENT_CODES --- */
+#define ASYNC_EVENT_CODE_LINK_STATE (1)
+#define ASYNC_EVENT_CODE_ISCSI (2)
+
+/* --- ASYNC_LINK_STATES --- */
+#define ASYNC_EVENT_LINK_DOWN (0) /* Link Down on a port */
+#define ASYNC_EVENT_LINK_UP (1) /* Link Up on a port */
+
+/*
+ * The last 4 bytes of the async events have this common format. It allows
+ * the driver to distinguish [link]MCC_CQ_ENTRY[/link] structs from
+ * asynchronous events. Both arrive on the same completion queue. This
+ * structure also contains the common fields used to decode the async event.
+ *
+ */
+typedef struct {
+ BE_BIT rsvd0[8]; /* DWORD 0 */
+ BE_BIT event_code[8]; /* DWORD 0 */
+ BE_BIT event_type[8]; /* DWORD 0 */
+ BE_BIT rsvd1[6]; /* DWORD 0 */
+ BE_BIT async_event; /* DWORD 0 */
+ BE_BIT valid; /* DWORD 0 */
+} SG_PACK BE_ASYNC_EVENT_TRAILER_AMAP;
+typedef struct {
+ u32 dw[1];
+} ASYNC_EVENT_TRAILER_AMAP, *PASYNC_EVENT_TRAILER_AMAP;
+
+/* --- ASYNC_ISCSI_EVENTS --- */
+/* iSCSI discovery services found a */
+/* new Target for this Initiator */
+#define ASYNC_ISCSI_EVENT_NEW_TARGET_DISCOVERED (4)
+#define ASYNC_ISCSI_EVENT_NEW_ISCSI_CONNECTION_ESTABLISHED (5)
+/* The firmware's background task (re) established a session for this
+ * initiator. In VM mode, this is the only mode in which new targets/LUNs
+ * can be added to a guest domain
+ * */
+#define ASYNC_ISCSI_EVENT_NEW_ISCSI_CONNECTION_ESTABLISHED (5)
+#define ASYNC_ISCSI_EVENT_NEW_TCP_CONNECTION_ESTABLISHED (7)
+/*
+ * Target mode ONLY - an initiator has opened a connection on the listen port
+ */
+#define ASYNC_ISCSI_EVENT_NEW_TCP_CONNECTION_ACCEPTED (16)
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __asyncmesg_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/mpu.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/mpu.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/mpu.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/mpu.h 2008-02-14 15:23:07.824203304 +0530
@@ -0,0 +1,107 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __mpu_amap_h__
+#define __mpu_amap_h__
+#include "setypes.h"
+#include "ep.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+
+/* Provide control parameters for the Managment Processor Unit. */
+typedef struct {
+ BE_EP_CSRMAP_AMAP ep;
+ BE_BIT rsvd0[128]; /* DWORD 64 */
+ BE_BIT rsvd1[32]; /* DWORD 68 */
+ BE_BIT rsvd2[192]; /* DWORD 69 */
+ BE_BIT rsvd3[192]; /* DWORD 75 */
+ BE_BIT rsvd4[32]; /* DWORD 81 */
+ BE_BIT rsvd5[32]; /* DWORD 82 */
+ BE_BIT rsvd6[32]; /* DWORD 83 */
+ BE_BIT rsvd7[32]; /* DWORD 84 */
+ BE_BIT rsvd8[32]; /* DWORD 85 */
+ BE_BIT rsvd9[32]; /* DWORD 86 */
+ BE_BIT rsvd10[32]; /* DWORD 87 */
+ BE_BIT rsvd11[32]; /* DWORD 88 */
+ BE_BIT rsvd12[32]; /* DWORD 89 */
+ BE_BIT rsvd13[32]; /* DWORD 90 */
+ BE_BIT rsvd14[32]; /* DWORD 91 */
+ BE_BIT rsvd15[32]; /* DWORD 92 */
+ BE_BIT rsvd16[32]; /* DWORD 93 */
+ BE_BIT rsvd17[32]; /* DWORD 94 */
+ BE_BIT rsvd18[32]; /* DWORD 95 */
+ BE_BIT rsvd19[32]; /* DWORD 96 */
+ BE_BIT rsvd20[32]; /* DWORD 97 */
+ BE_BIT rsvd21[32]; /* DWORD 98 */
+ BE_BIT rsvd22[32]; /* DWORD 99 */
+ BE_BIT rsvd23[32]; /* DWORD 100 */
+ BE_BIT rsvd24[32]; /* DWORD 101 */
+ BE_BIT rsvd25[32]; /* DWORD 102 */
+ BE_BIT rsvd26[32]; /* DWORD 103 */
+ BE_BIT rsvd27[32]; /* DWORD 104 */
+ BE_BIT rsvd28[96]; /* DWORD 105 */
+ BE_BIT rsvd29[32]; /* DWORD 108 */
+ BE_BIT rsvd30[32]; /* DWORD 109 */
+ BE_BIT rsvd31[32]; /* DWORD 110 */
+ BE_BIT rsvd32[32]; /* DWORD 111 */
+ BE_BIT rsvd33[32]; /* DWORD 112 */
+ BE_BIT rsvd34[96]; /* DWORD 113 */
+ BE_BIT rsvd35[32]; /* DWORD 116 */
+ BE_BIT rsvd36[32]; /* DWORD 117 */
+ BE_BIT rsvd37[32]; /* DWORD 118 */
+ BE_BIT rsvd38[32]; /* DWORD 119 */
+ BE_BIT rsvd39[32]; /* DWORD 120 */
+ BE_BIT rsvd40[32]; /* DWORD 121 */
+ BE_BIT rsvd41[134][32]; /* DWORD 122 */
+} SG_PACK BE_MPU_CSRMAP_AMAP;
+typedef struct {
+ u32 dw[256];
+} MPU_CSRMAP_AMAP, *PMPU_CSRMAP_AMAP;
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __mpu_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/doorbells.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/doorbells.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/doorbells.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/doorbells.h 2008-02-14 15:23:07.825203152 +0530
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __doorbells_amap_h__
+#define __doorbells_amap_h__
+#include "setypes.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+/* The TX/RDMA send queue doorbell. */
+typedef struct {
+ BE_BIT cid[11]; /* DWORD 0 */
+ BE_BIT rsvd0[5]; /* DWORD 0 */
+ BE_BIT numPosted[14]; /* DWORD 0 */
+ BE_BIT rsvd1[2]; /* DWORD 0 */
+} SG_PACK BE_SQ_DB_AMAP;
+typedef struct {
+ u32 dw[1];
+} SQ_DB_AMAP, *PSQ_DB_AMAP;
+
+/* The receive queue doorbell. */
+typedef struct {
+ BE_BIT rq[10]; /* DWORD 0 */
+ BE_BIT rsvd0[13]; /* DWORD 0 */
+ BE_BIT Invalidate; /* DWORD 0 */
+ BE_BIT numPosted[8]; /* DWORD 0 */
+} SG_PACK BE_RQ_DB_AMAP;
+typedef struct {
+ u32 dw[1];
+} RQ_DB_AMAP, *PRQ_DB_AMAP;
+
+/*
+ * The CQ/EQ doorbell. Software MUST set reserved fields in this
+ * descriptor to zero, otherwise (CEV) hardware will not execute the
+ * doorbell (flagging a bad_db_qid error instead).
+ */
+typedef struct {
+ BE_BIT qid[10]; /* DWORD 0 */
+ BE_BIT rsvd0[4]; /* DWORD 0 */
+ BE_BIT rearm; /* DWORD 0 */
+ BE_BIT event; /* DWORD 0 */
+ BE_BIT num_popped[13]; /* DWORD 0 */
+ BE_BIT rsvd1[3]; /* DWORD 0 */
+} SG_PACK BE_CQ_DB_AMAP;
+typedef struct {
+ u32 dw[1];
+} CQ_DB_AMAP, *PCQ_DB_AMAP;
+
+typedef struct {
+ BE_BIT qid[10]; /* DWORD 0 */
+ BE_BIT rsvd0[6]; /* DWORD 0 */
+ BE_BIT numPosted[11]; /* DWORD 0 */
+ BE_BIT mss_cnt[5]; /* DWORD 0 */
+} SG_PACK BE_TPM_RQ_DB_AMAP;
+typedef struct {
+ u32 dw[1];
+} TPM_RQ_DB_AMAP, *PTPM_RQ_DB_AMAP;
+
+/*
+ * Post WRB Queue Doorbell Register used by the host Storage stack
+ * to notify the controller of a posted Work Request Block
+ */
+typedef struct {
+ BE_BIT wrb_cid[10]; /* DWORD 0 */
+ BE_BIT rsvd0[6]; /* DWORD 0 */
+ BE_BIT wrb_index[8]; /* DWORD 0 */
+ BE_BIT numberPosted[8]; /* DWORD 0 */
+} SG_PACK BE_WRB_POST_DB_AMAP;
+typedef struct {
+ u32 dw[1];
+} WRB_POST_DB_AMAP, *PWRB_POST_DB_AMAP;
+
+/*
+ * Update Default PDU Queue Doorbell Register used to communicate
+ * to the controller that the driver has stopped processing the queue
+ * and where in the queue it stopped, this is
+ * a CQ Entry Type. Used by storage driver.
+ */
+typedef struct {
+ BE_BIT qid[10]; /* DWORD 0 */
+ BE_BIT rsvd0[4]; /* DWORD 0 */
+ BE_BIT rearm; /* DWORD 0 */
+ BE_BIT event; /* DWORD 0 */
+ BE_BIT cqproc[14]; /* DWORD 0 */
+ BE_BIT rsvd1[2]; /* DWORD 0 */
+} SG_PACK BE_DEFAULT_PDU_DB_AMAP;
+typedef struct {
+ u32 dw[1];
+} DEFAULT_PDU_DB_AMAP, *PDEFAULT_PDU_DB_AMAP;
+
+/* Management Command and Controller default fragment ring */
+typedef struct {
+ BE_BIT rid[11]; /* DWORD 0 */
+ BE_BIT rsvd0[5]; /* DWORD 0 */
+ BE_BIT numPosted[14]; /* DWORD 0 */
+ BE_BIT rsvd1[2]; /* DWORD 0 */
+} SG_PACK BE_MCC_DB_AMAP;
+typedef struct {
+ u32 dw[1];
+} MCC_DB_AMAP, *PMCC_DB_AMAP;
+
+/*
+ * Used for bootstrapping the Host interface. This register is
+ * used for driver communication with the MPU when no MCC Rings exist.
+ * The software must write this register twice to post any MCC
+ * command. First, it writes the register with hi=1 and the upper bits of
+ * the physical address for the MCC_MAILBOX structure. Software must poll
+ * the ready bit until this is acknowledged. Then, sotware writes the
+ * register with hi=0 with the lower bits in the address. It must
+ * poll the ready bit until the MCC command is complete. Upon completion,
+ * the MCC_MAILBOX will contain a valid completion queue entry.
+ */
+typedef struct {
+ BE_BIT ready; /* DWORD 0 */
+ BE_BIT hi; /* DWORD 0 */
+ BE_BIT address[30]; /* DWORD 0 */
+} SG_PACK BE_MPU_MAILBOX_DB_AMAP;
+typedef struct {
+ u32 dw[1];
+} MPU_MAILBOX_DB_AMAP, *PMPU_MAILBOX_DB_AMAP;
+
+/*
+ * This is the protection domain doorbell register map. Note that
+ * while this map shows doorbells for all Blade Engine supported
+ * protocols, not all of these may be valid in a given function or
+ * protection domain. It is the responsibility of the application
+ * accessing the doorbells to know which are valid. Each doorbell
+ * occupies 32 bytes of space, but unless otherwise specified,
+ * only the first 4 bytes should be written. There are 32 instances
+ * of these doorbells for the host and 31 virtual machines respectively.
+ * The host and VMs will only map the doorbell pages belonging to its
+ * protection domain. It will not be able to touch the doorbells for
+ * another VM. The doorbells are the only registers directly accessible
+ * by a virtual machine. Similarly, there are 511 additional
+ * doorbells for RDMA protection domains. PD 0 for RDMA shares
+ * the same physical protection domain doorbell page as ETH/iSCSI.
+ *
+ */
+typedef struct {
+ BE_BIT rsvd0[512]; /* DWORD 0 */
+ BE_SQ_DB_AMAP rdma_sq_db;
+ BE_BIT rsvd1[7][32]; /* DWORD 17 */
+ BE_WRB_POST_DB_AMAP iscsi_wrb_post_db;
+ BE_BIT rsvd2[7][32]; /* DWORD 25 */
+ BE_SQ_DB_AMAP etx_sq_db;
+ BE_BIT rsvd3[7][32]; /* DWORD 33 */
+ BE_RQ_DB_AMAP rdma_rq_db;
+ BE_BIT rsvd4[7][32]; /* DWORD 41 */
+ BE_DEFAULT_PDU_DB_AMAP iscsi_default_pdu_db;
+ BE_BIT rsvd5[7][32]; /* DWORD 49 */
+ BE_TPM_RQ_DB_AMAP tpm_rq_db;
+ BE_BIT rsvd6[7][32]; /* DWORD 57 */
+ BE_RQ_DB_AMAP erx_rq_db;
+ BE_BIT rsvd7[7][32]; /* DWORD 65 */
+ BE_CQ_DB_AMAP cq_db;
+ BE_BIT rsvd8[7][32]; /* DWORD 73 */
+ BE_MCC_DB_AMAP mpu_mcc_db;
+ BE_BIT rsvd9[7][32]; /* DWORD 81 */
+ BE_MPU_MAILBOX_DB_AMAP mcc_bootstrap_db;
+ BE_BIT rsvd10[935][32]; /* DWORD 89 */
+} SG_PACK BE_PROTECTION_DOMAIN_DBMAP_AMAP;
+typedef struct {
+ u32 dw[1024];
+} PROTECTION_DOMAIN_DBMAP_AMAP, *PPROTECTION_DOMAIN_DBMAP_AMAP;
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __doorbells_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_mcc.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_mcc.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_mcc.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_mcc.h 2008-02-14 15:23:07.825203152 +0530
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __ioctl_mcc_amap_h__
+#define __ioctl_mcc_amap_h__
+#include "setypes.h"
+#include "ioctl_defs.h"
+#include "ioctl_opcodes.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+
+/*
+ * Where applicable, a WRB, may contain a list of Scatter-gather elements.
+ * Each element supports a 64 bit address and a 32bit length field.
+ */
+typedef struct {
+ BE_BIT pa_lo[32]; /* DWORD 0 */
+ BE_BIT pa_hi[32]; /* DWORD 1 */
+ BE_BIT length[32]; /* DWORD 2 */
+} SG_PACK BE_MCC_SGE_AMAP;
+typedef struct {
+ u32 dw[3];
+} MCC_SGE_AMAP, *PMCC_SGE_AMAP;
+
+/*
+ * The design of an [link]MCC_SGE[/link] allows up to 19 elements to be
+ * embedded in a WRB, supporting 64KB data transfers (assuming a 4KB page size).
+ */
+typedef union {
+ BE_MCC_SGE_AMAP sgl[19];
+ BE_BIT embedded[59][32]; /* DWORD 0 */
+} SG_PACK BE_MCC_WRB_PAYLOAD_AMAP;
+typedef struct {
+ u32 dw[59];
+} MCC_WRB_PAYLOAD_AMAP, *PMCC_WRB_PAYLOAD_AMAP;
+
+/*
+ * This is the structure of the MCC Command WRB for commands
+ * sent to the Management Processing Unit (MPU). See section
+ * for usage in embedded and non-embedded modes.
+ */
+typedef struct {
+ BE_BIT embedded; /* DWORD 0 */
+ BE_BIT rsvd0[2]; /* DWORD 0 */
+ BE_BIT sge_count[5]; /* DWORD 0 */
+ BE_BIT rsvd1[16]; /* DWORD 0 */
+ BE_BIT special[8]; /* DWORD 0 */
+ BE_BIT payload_length[32]; /* DWORD 1 */
+ BE_BIT tag[2][32]; /* DWORD 2 */
+ BE_BIT rsvd2[32]; /* DWORD 4 */
+ BE_MCC_WRB_PAYLOAD_AMAP payload;
+} SG_PACK BE_MCC_WRB_AMAP;
+typedef struct {
+ u32 dw[64];
+} MCC_WRB_AMAP, *PMCC_WRB_AMAP;
+
+/* This is the structure of the MCC Completion queue entry */
+typedef struct {
+ BE_BIT completion_status[16]; /* DWORD 0 */
+ BE_BIT extended_status[16]; /* DWORD 0 */
+ BE_BIT mcc_tag[2][32]; /* DWORD 1 */
+ BE_BIT rsvd0[27]; /* DWORD 3 */
+ BE_BIT consumed; /* DWORD 3 */
+ BE_BIT completed; /* DWORD 3 */
+ BE_BIT hpi_buffer_completion; /* DWORD 3 */
+ BE_BIT async_event; /* DWORD 3 */
+ BE_BIT valid; /* DWORD 3 */
+} SG_PACK BE_MCC_CQ_ENTRY_AMAP;
+typedef struct {
+ u32 dw[4];
+} MCC_CQ_ENTRY_AMAP, *PMCC_CQ_ENTRY_AMAP;
+
+/* Mailbox structures used by the MPU during bootstrap */
+typedef struct {
+ BE_MCC_WRB_AMAP wrb;
+ BE_MCC_CQ_ENTRY_AMAP cq;
+} SG_PACK BE_MCC_MAILBOX_AMAP;
+typedef struct {
+ u32 dw[68];
+} MCC_MAILBOX_AMAP, *PMCC_MAILBOX_AMAP;
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __ioctl_mcc_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_hdr.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_hdr.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_hdr.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/ioctl_hdr.h 2008-02-14 15:23:07.826203000 +0530
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __ioctl_hdr_amap_h__
+#define __ioctl_hdr_amap_h__
+#include "setypes.h"
+#include "ioctl_defs.h"
+#include "ioctl_opcodes.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __ioctl_hdr_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/regmap.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/regmap.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/regmap.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/regmap.h 2008-02-14 15:23:07.826203000 +0530
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __regmap_amap_h__
+#define __regmap_amap_h__
+#include "setypes.h"
+#include "ep.h"
+#include "cev.h"
+#include "mpu.h"
+#include "doorbells.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+
+/*
+ * This is the control and status register map for BladeEngine, showing
+ * the relative size and offset of each sub-module. The CSR registers
+ * are identical for the network and storage PCI functions. The
+ * CSR map is shown below, followed by details of each block,
+ * in sub-sections. The sub-sections begin with a description
+ * of CSRs that are instantiated in multiple blocks.
+ */
+typedef struct {
+ BE_MPU_CSRMAP_AMAP mpu;
+ BE_BIT rsvd0[8192]; /* DWORD 256 */
+ BE_BIT rsvd1[8192]; /* DWORD 512 */
+ BE_CEV_CSRMAP_AMAP cev;
+ BE_BIT rsvd2[8192]; /* DWORD 1024 */
+ BE_BIT rsvd3[8192]; /* DWORD 1280 */
+ BE_BIT rsvd4[8192]; /* DWORD 1536 */
+ BE_BIT rsvd5[8192]; /* DWORD 1792 */
+ BE_BIT rsvd6[8192]; /* DWORD 2048 */
+ BE_BIT rsvd7[8192]; /* DWORD 2304 */
+ BE_BIT rsvd8[8192]; /* DWORD 2560 */
+ BE_BIT rsvd9[8192]; /* DWORD 2816 */
+ BE_BIT rsvd10[8192]; /* DWORD 3072 */
+ BE_BIT rsvd11[8192]; /* DWORD 3328 */
+ BE_BIT rsvd12[8192]; /* DWORD 3584 */
+ BE_BIT rsvd13[8192]; /* DWORD 3840 */
+ BE_BIT rsvd14[8192]; /* DWORD 4096 */
+ BE_BIT rsvd15[8192]; /* DWORD 4352 */
+ BE_BIT rsvd16[8192]; /* DWORD 4608 */
+ BE_BIT rsvd17[8192]; /* DWORD 4864 */
+ BE_BIT rsvd18[8192]; /* DWORD 5120 */
+ BE_BIT rsvd19[8192]; /* DWORD 5376 */
+ BE_BIT rsvd20[8192]; /* DWORD 5632 */
+ BE_BIT rsvd21[8192]; /* DWORD 5888 */
+ BE_BIT rsvd22[8192]; /* DWORD 6144 */
+ BE_BIT rsvd23[17152][32]; /* DWORD 6400 */
+} SG_PACK BE_BLADE_ENGINE_CSRMAP_AMAP;
+typedef struct {
+ u32 dw[23552];
+} BLADE_ENGINE_CSRMAP_AMAP, *PBLADE_ENGINE_CSRMAP_AMAP;
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __regmap_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/common_context.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/common_context.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/common_context.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/common_context.h 2008-02-14 15:23:07.827202848 +0530
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __common_context_amap_h__
+#define __common_context_amap_h__
+#include "setypes.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+/* --- RING_CONTEXT_SIZE_ENUM --- */
+#define RING_CONTEXT_SIZE_32K (0) /* 32768 entries */
+#define RING_CONTEXT_SIZE_0 (1) /* Invalid/reserved */
+#define RING_CONTEXT_SIZE_2 (2) /* 2 entries */
+#define RING_CONTEXT_SIZE_4 (3) /* 4 entries */
+#define RING_CONTEXT_SIZE_8 (4) /* 8 entries */
+#define RING_CONTEXT_SIZE_16 (5) /* 16 entries */
+#define RING_CONTEXT_SIZE_32 (6) /* 32 entries */
+#define RING_CONTEXT_SIZE_64 (7) /* 64 entries */
+#define RING_CONTEXT_SIZE_128 (8) /* 128 entries */
+#define RING_CONTEXT_SIZE_256 (9) /* 256 entries */
+#define RING_CONTEXT_SIZE_512 (10) /* 512 entries */
+#define RING_CONTEXT_SIZE_1K (11) /* 1024 entries */
+#define RING_CONTEXT_SIZE_2K (12) /* 2048 entries */
+#define RING_CONTEXT_SIZE_4K (13) /* 4096 entries */
+#define RING_CONTEXT_SIZE_8K (14) /* 8192 entries */
+#define RING_CONTEXT_SIZE_16K (15) /* 16384 entries */
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __common_context_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/post_codes.h benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/post_codes.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/amap/post_codes.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/amap/post_codes.h 2008-02-14 15:23:07.827202848 +0530
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2005 - 2008 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*
+ * Autogenerated by srcgen version: 0127
+ */
+#ifndef __post_codes_amap_h__
+#define __post_codes_amap_h__
+#include "setypes.h"
+
+#undef SG_PACK
+#if defined(SG_PRAGMA_PACK)
+#pragma pack(push, 1)
+#define SG_PACK
+#elif defined(SG_ATTRIBUTE_PACK)
+#define SG_PACK __attribute__ ((packed))
+#else
+#define SG_PACK
+#endif
+
+#ifndef SG_STATIC_INLINE
+#define SG_STATIC_INLINE static inline
+#endif
+/* --- MGMT_HBA_POST_STAGE_ENUM --- */
+#define POST_STAGE_POWER_ON_RESET (0) /* State after a cold or warm boot. */
+#define POST_STAGE_AWAITING_HOST_RDY (1) /* ARM boot code awaiting a
+ go-ahed from the host. */
+#define POST_STAGE_HOST_RDY (2) /* Host has given go-ahed to ARM. */
+#define POST_STAGE_BE_RESET (3) /* Host wants to reset chip, this is a chip
+ workaround */
+#define POST_STAGE_SEEPROM_CS_START (256) /* SEEPROM checksum
+ test start. */
+#define POST_STAGE_SEEPROM_CS_DONE (257) /* SEEPROM checksum test
+ done. */
+#define POST_STAGE_DDR_CONFIG_START (512) /* DDR configuration start. */
+#define POST_STAGE_DDR_CONFIG_DONE (513) /* DDR configuration done. */
+#define POST_STAGE_DDR_CALIBRATE_START (768) /* DDR calibration start. */
+#define POST_STAGE_DDR_CALIBRATE_DONE (769) /* DDR calibration done. */
+#define POST_STAGE_DDR_TEST_START (1024) /* DDR memory test start. */
+#define POST_STAGE_DDR_TEST_DONE (1025) /* DDR memory test done. */
+#define POST_STAGE_REDBOOT_INIT_START (1536) /* Redboot starts execution. */
+#define POST_STAGE_REDBOOT_INIT_DONE (1537) /* Redboot done execution. */
+#define POST_STAGE_FW_IMAGE_LOAD_START (1792) /* Firmware image load to
+ DDR start. */
+#define POST_STAGE_FW_IMAGE_LOAD_DONE (1793) /* Firmware image load
+ to DDR done. */
+#define POST_STAGE_ARMFW_START (2048) /* ARMfw runtime code
+ starts execution. */
+#define POST_STAGE_DHCP_QUERY_START (2304) /* DHCP server query start. */
+#define POST_STAGE_DHCP_QUERY_DONE (2305) /* DHCP server query done. */
+#define POST_STAGE_BOOT_TARGET_DISCOVERY_START (2560) /* Boot Target
+ Discovery Start. */
+#define POST_STAGE_BOOT_TARGET_DISCOVERY_DONE (2561) /* Boot Target
+ Discovery Done. */
+#define POST_STAGE_RC_OPTION_SET (2816) /* Remote configuration
+ option is set in SEEPROM */
+#define POST_STAGE_SWITCH_LINK (2817) /* Wait for link up on switch */
+#define POST_STAGE_SEND_ICDS_MESSAGE (2818) /* Send the ICDS message
+ to switch */
+#define POST_STAGE_PERFROM_TFTP (2819) /* Download xml using TFTP */
+#define POST_STAGE_PARSE_XML (2820) /* Parse XML file */
+#define POST_STAGE_DOWNLOAD_IMAGE (2821) /* Download IMAGE from
+ TFTP server */
+#define POST_STAGE_FLASH_IMAGE (2822) /* Flash the IMAGE */
+#define POST_STAGE_RC_DONE (2823) /* Remote configuration
+ complete */
+#define POST_STAGE_REBOOT_SYSTEM (2824) /* Upgrade IMAGE done,
+ reboot required */
+#define POST_STAGE_MAC_ADDRESS (3072) /* MAC Address Check */
+#define POST_STAGE_ARMFW_READY (49152) /* ARMfw is done with POST
+ and ready. */
+#define POST_STAGE_ARMFW_UE (61440) /* ARMfw has asserted an
+ unrecoverable error. The
+ lower 3 hex digits of the
+ stage code identify the
+ unique error code.
+ */
+
+
+/* --- MGMT_HBA_POST_DUMMY_BITS_ENUM --- */
+#define POST_BIT_ISCSI_LOADED (26)
+#define POST_BIT_OPTROM_INST (27)
+#define POST_BIT_BAD_IP_ADDR (28)
+#define POST_BIT_NO_IP_ADDR (29)
+#define POST_BIT_BACKUP_FW (30)
+#define POST_BIT_ERROR (31)
+
+/* --- MGMT_HBA_POST_DUMMY_VALUES_ENUM --- */
+#define POST_ISCSI_DRIVER_LOADED (67108864)
+#define POST_OPTROM_INSTALLED (134217728)
+#define POST_ISCSI_IP_ADDRESS_CONFLICT (268435456)
+#define POST_ISCSI_NO_IP_ADDRESS (536870912)
+#define POST_BACKUP_FW_LOADED (1073741824)
+#define POST_FATAL_ERROR (2147483648)
+
+#ifdef SG_PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* __post_codes_amap_h__ */
diff -uprN orig/linux-2.6.24.2/drivers/message/beclib/fw/be_gen_id_ranges.h benet/linux-2.6.24.2/drivers/message/beclib/fw/be_gen_id_ranges.h
--- orig/linux-2.6.24.2/drivers/message/beclib/fw/be_gen_id_ranges.h 1970-01-01 05:30:00.000000000 +0530
+++ benet/linux-2.6.24.2/drivers/message/beclib/fw/be_gen_id_ranges.h 2008-02-14 15:23:07.828202696 +0530
@@ -0,0 +1,240 @@
+/*
+ * Copyright (C) 2005 - 2007 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, 5th Floor
+ * Boston, MA 02110-1301 USA
+ *
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called GPL.
+ *
+ * Contact Information:
+ * linux-drivers@...verengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+/*!
+@...e
+ be_gen_id_ranges.h
+
+@...ef
+ Provides ID ranges and conversion macros between the types of ID numbers.
+
+*/
+#ifndef __be_gen_id_ranges_h__
+#define __be_gen_id_ranges_h__
+
+#ifndef BE_CONFIG
+#pragma message("WARNING: configuration not defined. Assuming BE_CONFIG=0"
+ " by default.")
+#define BE_CONFIG 0
+#endif
+
+#ifndef BE_GEN_ASSERT
+ #error "Error: BE_GEN_ASSERT not defined."
+#endif
+
+#ifndef BE_GEN_STATIC_INLINE
+ #error "Error: BE_GEN_STATIC_INLINE not defined."
+#endif
+
+
+/*/////////////////////////////////////////////////////////////////////// */
+/*
+ * For each BE_CONFIG value, define the CID ranges for the ULP protocol
+ * firmware.
+ *
+ * The BE_CONFIG definitions must match the description of the
+ * configuration under the fw\config\readme.txt file.
+ * The MAX_* literals must all be multiples of 32!!! This is an implementation
+ * restriction in the software that makes use of these literals for bitvector
+ * classes. Having a non-32 multiple MAX_* literal will cause an compile-time
+ * assert! At some point in the future this restriction may be removed (along
+ * with this comment blurb). Note: if the desired range is not an even multiple
+ * of 32, the developer must ensure the extra/invalid bits are not used.
+ */
+/*//////////////////////////////////////////////////////////////////// */
+
+#if (BE_CONFIG == 0)
+
+ /* --- CID_START_ENUM --- */
+ #define ISCSI_CID_START (0) /* Start of connection
+ ID range for ISCSI */
+ #define DEFPDU_CID_START (0) /* Start of connection
+ ID range for iSCSI
+ default pdu queue */
+ #define ETX_CID_START (1024) /* Start of connection
+ ID range for ETX */
+ #define RDMA_CID_START (0) /* Start of connection
+ ID range for RDMA */
+
+ /* --- MAX_CIDS_ENUM --- */
+ #define MAX_DEFPDU_CIDS (32) /* Maximum number of
+ iSCSI DEF pdu cids */
+ #define MAX_ETX_CIDS (64) /* Maximum number of ETX
+ connections */
+ #define MAX_ISCSI_CIDS (512) /* Maximum number of
+ ISCSI connections */
+ #define MAX_ISCSI_CIDS_CT (512) /* Maximum number of
+ ISCSI connections
+ per chute */
+ #define MAX_RDMA_CIDS (0) /* Maximum number of
+ RDMA connections */
+
+#elif (BE_CONFIG == 1)
+
+ /* --- CID_START_ENUM --- */
+ #define ISCSI_CID_START (0) /* Start of connection
+ ID range for ISCSI */
+ #define DEFPDU_CID_START (0) /* Start of connection
+ ID range for iSCSI
+ default pdu queue */
+ #define RDMA_CID_START (64) /* Start of connection
+ ID range for RDMA */
+ #define ETX_CID_START (1024) /* Start of connection
+ ID range for ETX */
+
+ /* --- MAX_CIDS_ENUM --- */
+ #define MAX_DEFPDU_CIDS (32) /* Maximum number of
+ iSCSI DEF pdu cids */
+ #define MAX_ISCSI_CIDS (64) /* Maximum number
+ of ISCSI connections */
+ #define MAX_ISCSI_CIDS_CT (64) /* Maximum number
+ of ISCSI connections
+ per chute */
+ #define MAX_ETX_CIDS (64) /* Maximum number of
+ ETX connections */
+ #define MAX_RDMA_CIDS (512) /* Maximum number
+ of RDMA connections */
+
+#elif (BE_CONFIG == 2)
+
+ /* --- CID_START_ENUM --- */
+ #define DEFPDU_CID_START (0) /* Start of connection
+ ID range for iSCSI
+ default pdu queue */
+ #define ISCSI_TGT_CID_START (448) /* Start of connection
+ ID range for ISCSI */
+ #define ISCSI_CID_START (ISCSI_TGT_CID_START)
+ #define ETX_CID_START (1024) /* Start of connection
+ ID range for ETX */
+ #define RDMA_CID_START (0) /* Start of connection
+ ID range for RDMA */
+
+ /* --- MAX_CIDS_ENUM --- */
+ #define MAX_DEFPDU_CIDS (32) /* Maximum number of
+ iSCSI DEF pdu cids */
+ #define MAX_ETX_CIDS (64) /* Maximum number of
+ ETX cids */
+ #define MAX_ISCSI_TGT_CIDS (512) /* Maximum number
+ of ISCSI connections */
+ #define MAX_ISCSI_CIDS (MAX_ISCSI_TGT_CIDS)
+ #define MAX_ISCSI_CIDS_CT (256) /* Maximum number of
+ ISCSI connections
+ per chute */
+ #define MAX_RDMA_CIDS (0) /* Maximum number of
+ RDMA connections */
+
+#elif (BE_CONFIG == 3)
+
+ /* --- CID_START_ENUM --- */
+ #define DEFPDU_CID_START (0) /* Start of connection
+ ID range for iSCSI
+ default pdu queue */
+ #define ISCSI_TGT_CID_START (0) /* Start of connection
+ ID range for ISCSI */
+ #define ISCSI_CID_START (ISCSI_TGT_CID_START)
+ #define ETX_CID_START (1024) /* Start of connection
+ ID range for ETX */
+ #define RDMA_CID_START (1024) /* Start of connection
+ ID range for RDMA */
+
+ /* --- MAX_CIDS_ENUM --- */
+ #define MAX_DEFPDU_CIDS (32) /* Maximum number
+ of iSCSI DEF pdu cids */
+ #define MAX_ETX_CIDS (64) /* Maximum number
+ of ETX cids */
+ #define MAX_ISCSI_TGT_CIDS (1024) /* Maximum number
+ of ISCSI connections
+ supported. */
+ #define MAX_ISCSI_CIDS (MAX_ISCSI_TGT_CIDS)
+ #define MAX_ISCSI_CIDS_CT (512) /* Maximum number of
+ ISCSI connections per
+ chute */
+ #define MAX_RDMA_CIDS (0) /* Maximum number of
+ RDMA connections */
+
+#elif (BE_CONFIG == 4)
+
+ /* --- CID_START_ENUM --- */
+ #define ISCSI_CID_START (0) /* Start of connection
+ ID range for ISCSI */
+ #define DEFPDU_CID_START (0) /* Start of connection
+ ID range for iSCSI
+ default pdu queue */
+ #define ETX_CID_START (1024) /* Start of connection
+ ID range for ETX */
+ #define RDMA_CID_START (0) /* Start of connection
+ ID range for RDMA */
+
+ /* --- MAX_CIDS_ENUM --- */
+ #define MAX_DEFPDU_CIDS (32) /* Maximum number of
+ iSCSI DEF pdu cids */
+ #define MAX_ETX_CIDS (64) /* Maximum number of
+ ETX connections */
+ #define MAX_ISCSI_CIDS (512) /* Maximum number of
+ ISCSI connections */
+ #define MAX_ISCSI_CIDS_CT (256) /* Maximum number of
+ ISCSI connections per
+ chute */
+ #define MAX_RDMA_CIDS (0) /* Maximum number of
+ RDMA connections */
+
+
+#else
+ #error Error: Invalid configuration (BE_CONFIG unrecognized).
+#endif
+
+
+/* Define the ethernet CIDs used for iSCSI OOO packet replay. Currently
+ * the maximum number of iSCSI chutes/ulps is 2. Each iSCSI chute
+ * requries one reserved CID number. We have chosen the following
+ * format for these literals:
+ * a) ISCSI_OOO_CID - used for replay from iSCSI chute A (rxulp0),
+ * must be an even number
+ * b) ISCSI_OOO_CID1 - used for replay from iSCSI chute B (rxulp1),
+ * must be adjacent to
+ * chute A's CID, only applicable on dual-chute iSCSI
+ */
+#define ISCSI_OOO_CID (1086)
+#define ISCSI_OOO_CID1 (1087)
+
+
+/* Define the ethernet CIDs that have higher priority over normal
+ * ethernet transmit rings. Each etx ULP requires one reserved super
+ * CID number. Currently the maximum number of ethernet chutes is 2.
+ * We have chosen the following format for these literals:
+ * a) ETX_SUPER_CID_ULP2 - used for etx with txulp2
+ * b) ETX_SUPER_CID_ULP1 - used for etx with txulp1
+ *
+ */
+#define ETX_SUPER_CID_ULP2 (ETX_CID_START)
+#define ETX_SUPER_CID_ULP1 (ETX_CID_START + 1)
+
+#endif /* __be_gen_id_ranges_h__ */
+
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