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Date:	Wed, 27 Feb 2008 17:15:14 -0600
From:	Andy Fleming <afleming@...escale.com>
To:	Alexandr Smirnov <asmirnov@...mvista.com>
Cc:	netdev@...r.kernel.org, vbordug@...mvista.com, mgreer@...sta.com
Subject: Re: [PATCH] Marvell PHY m88e1111 driver fix


On Feb 27, 2008, at 04:21, Alexandr Smirnov wrote:

> Hi All
>
>    Marvell PHY m88e1111 (not sure about other models, but think  
> they too) works
> in two modes: fiber and copper. In Marvell PHY driver (that we have  
> in current
> community kernels) code supported only copper mode, and this is not
> configurable, bits for copper mode are simply written in registers  
> during PHY
> initialization. This patch adds support for both modes.
>
>    According to 88e1111 manual: when phy is in copper mode,  
> register 22[7:0] = 0
> it selects copper banks of registers: 0, 1, 4, 5, 6, 7, 8, 17, 18,  
> 19; in fiber
> mode register 22[7:0] = 1 it selects the same banks of registers.  
> There is no
> register 10 (that is used in genphy_read_status() function) in  
> these banks.
>
>    Also as stated in manual register 10 is only for page 0 IOW  
> copper mode, and
> in fiber mode it probably contains wrong data (even when 22[7:0] = 1).
>
>    I tested this on several boards on where phy is connected in  
> fiber mode
> (SERDES). It doesn't work when genphy_read_status() is used.
>
>    At the moment I'm not sure if there's way of using  
> genphy_read_status()
> without any modifications to this function.


Yeah, if register 10 is page 0 only, it won't work for fiber.  It's  
annoying that the docs actually show it in both pages, but the  
register description says "page 0 only".  It's also annoying that  
they would thwart the 802.3 standard like that.  Anyway:

Acked-by: Andy Fleming <afleming@...escale.com>

Andy
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