netdev - Re: [PATCH 1/2] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround

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Message-ID: <20080328223005.34181eb7@zod.rchland.ibm.com>
Date:	Fri, 28 Mar 2008 22:30:05 -0500
From:	Josh Boyer <jwboyer@...ux.vnet.ibm.com>
To:	Jeff Garzik <jeff@...zik.org>
Cc:	Valentine Barshak <vbarshak@...mvista.com>,
	linuxppc-dev@...abs.org, benh@...nel.crashing.org,
	netdev@...r.kernel.org
Subject: Re: [PATCH 1/2] ibm_newemac: PowerPC 440GX EMAC PHY clock
 workaround

On Fri, 28 Mar 2008 22:18:25 -0400
Jeff Garzik <jeff@...zik.org> wrote:

> Valentine Barshak wrote:
> > The PowerPC 440GX Taishan board fails to reset EMAC3 (reset timeout error)
> > if there's no link. Because of that it fails to find PHY chip. The older ibm_emac
> > driver had a workaround for that: the EMAC_CLK_INTERNAL/EMAC_CLK_EXTERNAL macros,
> > which toggle the Ethernet Clock Select bit in the SDR0_MFR register. This patch
> > does the same for "ibm,emac-440gx" compatible chips. The workaround forces
> > clock on -all- EMACs, so we select clock under global emac_phy_map_lock.
> > 
> > Signed-off-by: Valentine Barshak <vbarshak@...mvista.com>
> > ---
> >  drivers/net/ibm_newemac/core.c |   16 +++++++++++++++-
> >  drivers/net/ibm_newemac/core.h |    8 ++++++--
> >  2 files changed, 21 insertions(+), 3 deletions(-)
> 
> is this for 2.6.25-rc?

No.  This, and patch 2/2, are for 2.6.26 and depend on a patch in my
tree.  These are the two Ben asked about going through the powerpc tree
but naturally we wanted an Ack from you first.

thx,
josh 
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