netdev - RE: packetloss, on e1000e worse than r8169?

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Message-Id: <20080617014849.M77611@visp.net.lb>
Date:	Tue, 17 Jun 2008 04:53:47 +0300
From:	"Denys Fedoryshchenko" <denys@...p.net.lb>
To:	"Brandeburg, Jesse" <jesse.brandeburg@...el.com>,
	"Eric Dumazet" <dada1@...mosbay.com>
Cc:	<netdev@...r.kernel.org>
Subject: RE: packetloss, on e1000e worse than r8169?

On Mon, 16 Jun 2008 16:24:22 -0700, Brandeburg, Jesse wrote
> 
> error stats update only every two seconds from e1000e watchdog timer.
> 
> Please try using ethtool -C ethX rx-usecs 10 (100,000 interrupts per
> second possible)
> 
> The realtek may not have the same kind of interrupt moderation as the
> e1000e part.  Also, you mentioned elsewhere in this thread that PCIe
> should have plenty of bandwith but the reality is that x1 PCIe has a 
> lot of latency so as you try to push a lot of small packets they may 
> not be processed fast enough.
> 
> Try turning off Flow Control using ethtool -A ethX rx off tx off autoneg
> off
> 
> rx_missed_errors is because you're running out of RX FIFO in the
> adapter, and we can try to change some code to increase the RX fifo 
> to a larger value, if you're using default 1500 MTU, you only need 
> 4K TX fifo, so can have a little more RX fifo than what you have by default
> (it's the PBA register we need to change the lower 16 bits to 0x1c)
> 
> Jesse
First of all thanks for all efforts and help you gave me guys. I wish i can
solve this problem and probably it will help someone in future. Sure i can
easily put server with PCI-X e1000, but probably it is good idea to find bug,
if there is any.

Now i changed motherboard, to another one (without AMT), same family and same
e1000e onboard.
Now it is DG965SS.

I will try to play with flow control and interrupt moderation on it.

By the way, i have ICH8, is there anything i can hit because of it?
i notice
        /* Workaround for ICH8 bit corruption issue in FIFO memory */
        if (hw->mac.type == e1000_ich8lan) {
                /* Set Tx and Rx buffer allocation to 8k apiece. */
                ew32(PBA, E1000_PBA_8K);
                /* Set Packet Buffer Size to 16k. */
                ew32(PBS, E1000_PBS_16K);
        }


About PBA, is i need to change something here?
                /*
                 * the Tx fifo also stores 16 bytes of information about the tx
                 * but don't include ethernet FCS because hardware appends it
                 */
                min_tx_space = (adapter->max_frame_size +
                                sizeof(struct e1000_tx_desc) -
                                ETH_FCS_LEN) * 2;
                min_tx_space = ALIGN(min_tx_space, 1024);
                min_tx_space >>= 10;
                /* software strips receive CRC, so leave room for it */
                min_rx_space = adapter->max_frame_size;
                min_rx_space = ALIGN(min_rx_space, 1024);
                min_rx_space >>= 10;


--
Denys Fedoryshchenko
Technical Manager
Virtual ISP S.A.L.

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