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Message-Id: <12194364661529-git-send-email-ron.mercer@qlogic.com>
Date: Fri, 22 Aug 2008 13:21:03 -0700
From: Ron Mercer <ron.mercer@...gic.com>
To: jeff@...zik.org
Cc: netdev@...r.kernel.org, Ron Mercer <ron.mercer@...gic.com>
Subject: [PATCH 3/6] [RFC] qlge: New Driver: Added management file qlge_mpi.c
Signed-off-by: Ron Mercer <ron.mercer@...gic.com>
---
drivers/net/qlge/qlge_mpi.c | 220 +++++++++++++++++++++++++++++++++++++++++++
1 files changed, 220 insertions(+), 0 deletions(-)
create mode 100755 drivers/net/qlge/qlge_mpi.c
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c
new file mode 100755
index 0000000..cf784a7
--- /dev/null
+++ b/drivers/net/qlge/qlge_mpi.c
@@ -0,0 +1,220 @@
+#include "qlge.h"
+
+/*
+ * Returns zero on success.
+ */
+static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev)
+{
+ int count = 50;
+ u32 temp;
+
+ while (count) {
+ temp = ql_read32(qdev, STS);
+ if (temp & STS_PI)
+ return 0;
+ mdelay(5);
+ if (!(count % 100))
+ QPRINTK(DRV, DEBUG, "Wait for mbox command.\n");
+ count--;
+ }
+ return -ETIMEDOUT;
+}
+
+static int ql_write_mbox_reg(struct ql_adapter *qdev, u32 reg, u32 data)
+{
+ int status = 0;
+ /* wait for reg to come ready */
+ if ((status = ql_wait_addr_reg(qdev, PROC_ADDR, PROC_ADDR_RDY)))
+ goto exit;
+ /* write the data to the data reg */
+ ql_write32(qdev, PROC_DATA, data);
+ /* trigger the write */
+ ql_write32(qdev, PROC_ADDR, reg);
+ /* wait for reg to come ready */
+ if ((status = ql_wait_addr_reg(qdev, PROC_ADDR, PROC_ADDR_RDY)))
+ goto exit;
+exit:
+ return status;
+}
+
+static int ql_read_mbox_reg(struct ql_adapter *qdev, u32 reg, u32 * data)
+{
+ int status = 0;
+ /* wait for reg to come ready */
+ if ((status = ql_wait_addr_reg(qdev, PROC_ADDR, PROC_ADDR_RDY)))
+ goto exit;
+ /* set up for reg read */
+ ql_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R);
+ /* wait for reg to come ready */
+ if ((status = ql_wait_addr_reg(qdev, PROC_ADDR, PROC_ADDR_RDY)))
+ goto exit;
+ /* get the data */
+ *data = ql_read32(qdev, PROC_DATA);
+exit:
+ return status;
+}
+
+static int ql_exec_mb_cmd(struct ql_adapter *qdev, struct mbox_params *mbcp)
+{
+ int i, status;
+
+ /*
+ * Make sure there's nothing pending.
+ * This shouldn't happen.
+ */
+ if (ql_read32(qdev, CSR) & CSR_HRI)
+ return -EBUSY;
+
+ if ((status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK)))
+ return -EBUSY;
+ /*
+ * Fill the outbound mailboxes.
+ */
+ for (i = 0; i < mbcp->in_count; i++) {
+ if ((status =
+ ql_write_mbox_reg(qdev, qdev->mailbox_in + i,
+ mbcp->mbox_in[i])))
+ goto end;
+ }
+ /*
+ * Wake up the MPI firmware.
+ */
+ ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT);
+end:
+ ql_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */
+ return status;
+}
+
+int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp)
+{
+ int i, status = 0;
+
+ if ((status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK)))
+ return -EBUSY;
+ for (i = 0; i < mbcp->out_count; i++) {
+ if ((status =
+ ql_read_mbox_reg(qdev, qdev->mailbox_out + i,
+ &mbcp->mbox_out[i]))) {
+ QPRINTK(DRV, ERR, "Failed mailbox read.\n");
+ break;
+ }
+ }
+ ql_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */
+ return status;
+}
+
+static void ql_link_up(struct ql_adapter *qdev)
+{
+ struct mbox_params mbc;
+ struct mbox_params *mbcp = &mbc;
+ mbcp->out_count = 2;
+
+ if (ql_get_mb_sts(qdev, mbcp)) {
+ goto exit;
+ }
+ qdev->link_status = mbcp->mbox_out[1];
+ QPRINTK(DRV, ERR, "Link Up.\n");
+ QPRINTK(DRV, ERR, "Link Status = 0x%.08x.\n", mbcp->mbox_out[1]);
+ if (!netif_carrier_ok(qdev->ndev)) {
+ QPRINTK(LINK, INFO, "Link is Up.\n");
+ netif_carrier_on(qdev->ndev);
+ netif_wake_queue(qdev->ndev);
+ }
+exit:
+ /* Clear the MPI firmware status. */
+ ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
+}
+
+static void ql_link_down(struct ql_adapter *qdev)
+{
+ struct mbox_params mbc;
+ struct mbox_params *mbcp = &mbc;
+ mbcp->out_count = 3;
+
+ if (ql_get_mb_sts(qdev, mbcp)) {
+ QPRINTK(DRV, ERR, "Firmware did not initialize!\n");
+ goto exit;
+ }
+
+ if (netif_carrier_ok(qdev->ndev)) {
+ QPRINTK(LINK, INFO, "Link is Down.\n");
+ netif_carrier_off(qdev->ndev);
+ netif_stop_queue(qdev->ndev);
+ }
+ QPRINTK(DRV, ERR, "Link Down.\n");
+ QPRINTK(DRV, ERR, "Link Status = 0x%.08x.\n", mbcp->mbox_out[1]);
+exit:
+ /* Clear the MPI firmware status. */
+ ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
+}
+
+static void ql_init_fw_done(struct ql_adapter *qdev)
+{
+ struct mbox_params mbc;
+ struct mbox_params *mbcp = &mbc;
+ mbcp->out_count = 2;
+
+ if (ql_get_mb_sts(qdev, mbcp)) {
+ QPRINTK(DRV, ERR, "Firmware did not initialize!\n");
+ goto exit;
+ }
+ QPRINTK(DRV, ERR, "Firmware initialized!\n");
+ QPRINTK(DRV, ERR, "Firmware status = 0x%.08x.\n", mbcp->mbox_out[0]);
+ QPRINTK(DRV, ERR, "Firmware Revision = 0x%.08x.\n", mbcp->mbox_out[1]);
+exit:
+ /* Clear the MPI firmware status. */
+ ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
+}
+
+void ql_mpi_work(struct work_struct *work)
+{
+ struct ql_adapter *qdev =
+ container_of(work, struct ql_adapter, mpi_work.work);
+ struct mbox_params mbc;
+ struct mbox_params *mbcp = &mbc;
+ mbcp->out_count = 1;
+
+ while (ql_read32(qdev, STS) & STS_PI) {
+ if (ql_get_mb_sts(qdev, mbcp)) {
+ QPRINTK(DRV, ERR,
+ "Could not read MPI, resetting ASIC!\n");
+ ql_queue_asic_error(qdev);
+ }
+
+ switch (mbcp->mbox_out[0]) {
+ case AEN_LINK_UP:
+ ql_link_up(qdev);
+ break;
+ case AEN_LINK_DOWN:
+ ql_link_down(qdev);
+ break;
+ case AEN_FW_INIT_DONE:
+#ifdef PALLADIUM
+/* Palladium Workaround Start */
+ case 0:
+/* Palladium Workaround End */
+#endif
+ ql_init_fw_done(qdev);
+ break;
+ case AEN_FW_INIT_FAIL:
+ break;
+ case AEN_SYS_ERR:
+ break;
+ case MB_CMD_STS_GOOD:
+ case MB_CMD_STS_INTRMDT:
+ case MB_CMD_STS_ERR:
+ case AEN_IDC_CMPLT:
+ case AEN_IDC_REQ:
+ break;
+
+ }
+ }
+ ql_enable_completion_interrupt(qdev, 0);
+}
+
+void ql_mpi_reset_work(struct work_struct *work)
+{
+ struct ql_adapter *qdev =
+ container_of(work, struct ql_adapter, mpi_reset_work.work);
+ printk(KERN_ERR "%s: Enter, qdev = %p..\n", __func__, qdev);
+}
--
1.5.0.rc4.16.g9e258
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