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Date:	Wed, 05 Nov 2008 03:42:24 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	zbr@...emap.net
Cc:	ilpo.jarvinen@...sinki.fi, netdev@...r.kernel.org, efault@....de,
	mingo@...e.hu, a.p.zijlstra@...llo.nl, herbert@...dor.apana.org.au
Subject: Re: tbench wrt. loopback TSO

From: David Miller <davem@...emloft.net>
Date: Mon, 27 Oct 2008 11:39:04 -0700 (PDT)

> One idea immediately occurs to me.  Since we're effectively limited
> to a 64K TSO frame, and the MSS is some value smaller than that, we
> can probably get away with a reciprocol divide.  Even using a 16-bit
> inverse value would suffice, so we wouldn't need to use u64's like
> some other pieces of code do.  A u32 would be enough.

I couldn't get anywhere with this idea.

The problem is that 16-bits provides not enough precision for accurate
divisions by multiplication.

For example, for a divisor of 1500 and a shift of 16 neither 43 nor 44
provides an accurate calculation.

So we'd need to use a u64 and a shift of 32, and on 32-bit cpus that
could be expensive, but perhaps not as expensive as the divide.


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