netdev - Re: [PATCH 3/5] qlge: bugfix: Fix endian issue regarding shadow registers.

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Date:	Wed, 24 Dec 2008 18:35:31 +0000
From:	Ben Hutchings <bhutchings@...arflare.com>
To:	Ron Mercer <ron.mercer@...gic.com>
Cc:	netdev@...r.kernel.org
Subject: Re: [PATCH 3/5] qlge: bugfix: Fix endian issue regarding shadow
	registers.

On Wed, 2008-12-24 at 10:21 -0800, Ron Mercer wrote:
> Shadow registers are host memory locations that the chip echos queue indexes to.
> The chip does this in little endian values, so they need to be swapped before referencing.
> 
> Signed-off-by: Ron Mercer <ron.mercer@...gic.com>
> ---
>  drivers/net/qlge/qlge.h |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
>  mode change 100644 => 100755 drivers/net/qlge/qlge.h
> 
> diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h
> old mode 100644
> new mode 100755
> index ba2e1c5..f1751a2
> --- a/drivers/net/qlge/qlge.h
> +++ b/drivers/net/qlge/qlge.h
> @@ -1477,9 +1477,9 @@ static inline void ql_write_db_reg(u32 val, void __iomem *addr)
>   * update the relevant index register and then copy the value to the
>   * shadow register in host memory.
>   */
> -static inline unsigned int ql_read_sh_reg(const volatile void  *addr)
> +static inline u32 ql_read_sh_reg(const volatile void  *addr)
>  {
> -	return *(volatile unsigned int __force *)addr;
> +	return le32_to_cpu(*(volatile unsigned int __force *)addr);

I think that should be:
	return le32_to_cpu(*(const volatile __le32 *)addr);

Ben.

>  }
>  
>  extern char qlge_driver_name[];

-- 
Ben Hutchings, Senior Software Engineer, Solarflare Communications
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.

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