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Message-Id: <20090128.124719.200850704.davem@davemloft.net>
Date:	Wed, 28 Jan 2009 12:47:19 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	cl@...ux-foundation.org
Cc:	tj@...nel.org, rusty@...tcorp.com.au, mingo@...e.hu,
	herbert@...dor.apana.org.au, akpm@...ux-foundation.org,
	hpa@...or.com, brgerst@...il.com, ebiederm@...ssion.com,
	travis@....com, linux-kernel@...r.kernel.org, steiner@....com,
	hugh@...itas.com, netdev@...r.kernel.org,
	mathieu.desnoyers@...ymtl.ca
Subject: Re: [PATCH] percpu: add optimized generic percpu accessors

From: Christoph Lameter <cl@...ux-foundation.org>
Date: Wed, 28 Jan 2009 11:45:28 -0500 (EST)

> On Tue, 27 Jan 2009, David Miller wrote:
> 
> > > Why wont it scale? this is a separate TLB entry for each processor.
> >
> > The IA64 per-cpu TLB entry only covers 64k which makes use of it for
> > dynamic per-cpu stuff out of the question.  That's why it "doesn't
> > scale"
> 
> IA64 supports varying page sizes. You can use a 128k TLB entry etc.

Good luck moving to a larger size dynamically at run time.

It really isn't a tenable solution.
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