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Message-Id: <1233710223-17808-2-git-send-email-afleming@freescale.com>
Date:	Tue,  3 Feb 2009 19:17:00 -0600
From:	Andy Fleming <afleming@...escale.com>
To:	davem@...emloft.net, jeff@...zik.org
Cc:	netdev@...r.kernel.org, Andy Fleming <afleming@...escale.com>
Subject: [PATCH v2.6.29 2/2] gianfar: Fix potential soft reset race

SOFT_RESET must be asserted for at least 3 TX clocks in order for it to work
properly.  The syncs in the gfar_write() commands have been hiding this, but
we need to guarantee it.

Signed-off-by: Andy Fleming <afleming@...escale.com>
---
 drivers/net/gianfar.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 3f7eab4..acae2d8 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -351,6 +351,9 @@ static int gfar_probe(struct of_device *ofdev,
 	/* Reset MAC layer */
 	gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
 
+	/* We need to delay at least 3 TX clocks */
+	udelay(2);
+
 	tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
 	gfar_write(&priv->regs->maccfg1, tempval);
 
-- 
1.5.4.GIT

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